From 1e76e65007ecabb905cc8e51f74db1cb87fb4067 Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Wed, 15 Apr 2009 00:00:48 +0000 Subject: [PATCH] GR8_NOREX can contain the H registers, since they don't require REX prefixes. llvm-svn: 69108 --- lib/Target/X86/X86RegisterInfo.td | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/lib/Target/X86/X86RegisterInfo.td b/lib/Target/X86/X86RegisterInfo.td index f4e0cb7fd13..7137f6b88a7 100644 --- a/lib/Target/X86/X86RegisterInfo.td +++ b/lib/Target/X86/X86RegisterInfo.td @@ -483,7 +483,8 @@ def GR64_ : RegisterClass<"X86", [i64], 64, [RAX, RCX, RDX, RBX]> { // On x86-64, GR64_NOREX, GR32_NOREX and GR16_NOREX are the classes // of registers which do not by themselves require a REX prefix. def GR8_NOREX : RegisterClass<"X86", [i8], 8, - [AL, CL, DL, SIL, DIL, BL, BPL, SPL]> { + [AL, CL, DL, BL, AH, CH, DH, BH, + SIL, DIL, BPL, SPL]> { let MethodProtos = [{ iterator allocation_order_begin(const MachineFunction &MF) const; iterator allocation_order_end(const MachineFunction &MF) const; @@ -500,7 +501,7 @@ def GR8_NOREX : RegisterClass<"X86", [i8], 8, }; // In 32-mode, none of the 8-bit registers aliases EBP or ESP. static const unsigned X86_GR8_NOREX_AO_32[] = { - X86::AL, X86::CL, X86::DL, X86::BL + X86::AL, X86::CL, X86::DL, X86::AH, X86::CH, X86::DH, X86::BL, X86::BH }; GR8_NOREXClass::iterator