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[AArch64][GlobalISel] Fold constants into G_GLOBAL_VALUE
This is pretty much just ports `performGlobalAddressCombine` from AArch64ISelLowering. (AArch64 doesn't use the generic DAG combine for this.) This adds a pre-legalize combine which looks for this pattern: ``` %g = G_GLOBAL_VALUE @x %ptr1 = G_PTR_ADD %g, cst1 %ptr2 = G_PTR_ADD %g, cst2 ... %ptrN = G_PTR_ADD %g, cstN ``` And then, if possible, transforms it like so: ``` %g = G_GLOBAL_VALUE @x %offset_g = G_PTR_ADD %g, -min(cst) %ptr1 = G_PTR_ADD %offset_g, cst1 %ptr2 = G_PTR_ADD %offset_g, cst2 ... %ptrN = G_PTR_ADD %offset_g, cstN ``` Where min(cst) is the smallest out of the G_PTR_ADD constants. This means we should save at least one G_PTR_ADD. This also updates code in the legalizer + selector which assumes that G_GLOBAL_VALUE will never have an offset and adds/updates relevant tests. Differential Revision: https://reviews.llvm.org/D96624
This commit is contained in:
Jessica Paquette
parent
42bd4878de
commit
1f262f8352
@ -24,10 +24,20 @@ def icmp_redundant_trunc : GICombineRule<
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[{ return matchICmpRedundantTrunc(*${root}, MRI, Helper.getKnownBits(), ${matchinfo}); }]),
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(apply [{ applyICmpRedundantTrunc(*${root}, MRI, B, Observer, ${matchinfo}); }])>;
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// AArch64-specific offset folding for G_GLOBAL_VALUE.
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def fold_global_offset_matchdata : GIDefMatchData<"std::pair<uint64_t, uint64_t>">;
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def fold_global_offset : GICombineRule<
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(defs root:$root, fold_global_offset_matchdata:$matchinfo),
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(match (wip_match_opcode G_GLOBAL_VALUE):$root,
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[{ return matchFoldGlobalOffset(*${root}, MRI, ${matchinfo}); }]),
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(apply [{ return applyFoldGlobalOffset(*${root}, MRI, B, Observer, ${matchinfo});}])
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>;
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def AArch64PreLegalizerCombinerHelper: GICombinerHelper<
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"AArch64GenPreLegalizerCombinerHelper", [all_combines,
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fconstant_to_constant,
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icmp_redundant_trunc]> {
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icmp_redundant_trunc,
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fold_global_offset]> {
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let DisableRuleOption = "aarch64prelegalizercombiner-disable-rule";
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let StateClass = "AArch64PreLegalizerCombinerHelperState";
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let AdditionalArguments = [];
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@ -5628,8 +5628,10 @@ AArch64InstructionSelector::tryFoldAddLowIntoImm(MachineInstr &RootDef,
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return None;
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// TODO: add heuristics like isWorthFoldingADDlow() from SelectionDAG.
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// TODO: Need to check GV's offset % size if doing offset folding into globals.
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assert(Adrp.getOperand(1).getOffset() == 0 && "Unexpected offset in global");
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auto Offset = Adrp.getOperand(1).getOffset();
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if (Offset % Size != 0)
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return None;
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auto GV = Adrp.getOperand(1).getGlobal();
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if (GV->isThreadLocal())
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return None;
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@ -5643,7 +5645,7 @@ AArch64InstructionSelector::tryFoldAddLowIntoImm(MachineInstr &RootDef,
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Register AdrpReg = Adrp.getOperand(0).getReg();
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return {{[=](MachineInstrBuilder &MIB) { MIB.addUse(AdrpReg); },
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[=](MachineInstrBuilder &MIB) {
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MIB.addGlobalAddress(GV, /* Offset */ 0,
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MIB.addGlobalAddress(GV, Offset,
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OpFlags | AArch64II::MO_PAGEOFF |
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AArch64II::MO_NC);
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}}};
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@ -781,7 +781,8 @@ bool AArch64LegalizerInfo::legalizeSmallCMGlobalValue(
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// G_ADD_LOW instructions.
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// By splitting this here, we can optimize accesses in the small code model by
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// folding in the G_ADD_LOW into the load/store offset.
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auto GV = MI.getOperand(1).getGlobal();
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auto &GlobalOp = MI.getOperand(1);
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const auto* GV = GlobalOp.getGlobal();
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if (GV->isThreadLocal())
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return true; // Don't want to modify TLS vars.
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@ -791,9 +792,10 @@ bool AArch64LegalizerInfo::legalizeSmallCMGlobalValue(
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if (OpFlags & AArch64II::MO_GOT)
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return true;
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auto Offset = GlobalOp.getOffset();
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Register DstReg = MI.getOperand(0).getReg();
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auto ADRP = MIRBuilder.buildInstr(AArch64::ADRP, {LLT::pointer(0, 64)}, {})
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.addGlobalAddress(GV, 0, OpFlags | AArch64II::MO_PAGE);
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.addGlobalAddress(GV, Offset, OpFlags | AArch64II::MO_PAGE);
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// Set the regclass on the dest reg too.
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MRI.setRegClass(ADRP.getReg(0), &AArch64::GPR64RegClass);
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@ -811,6 +813,8 @@ bool AArch64LegalizerInfo::legalizeSmallCMGlobalValue(
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// binary must also be loaded into address range [0, 2^48). Both of these
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// properties need to be ensured at runtime when using tagged addresses.
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if (OpFlags & AArch64II::MO_TAGGED) {
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assert(!Offset &&
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"Should not have folded in an offset for a tagged global!");
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ADRP = MIRBuilder.buildInstr(AArch64::MOVKXi, {LLT::pointer(0, 64)}, {ADRP})
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.addGlobalAddress(GV, 0x100000000,
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AArch64II::MO_PREL | AArch64II::MO_G3)
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@ -819,7 +823,7 @@ bool AArch64LegalizerInfo::legalizeSmallCMGlobalValue(
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}
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MIRBuilder.buildInstr(AArch64::G_ADD_LOW, {DstReg}, {ADRP})
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.addGlobalAddress(GV, 0,
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.addGlobalAddress(GV, Offset,
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OpFlags | AArch64II::MO_PAGEOFF | AArch64II::MO_NC);
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MI.eraseFromParent();
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return true;
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@ -107,6 +107,116 @@ static bool applyICmpRedundantTrunc(MachineInstr &MI, MachineRegisterInfo &MRI,
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return true;
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}
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/// \returns true if it is possible to fold a constant into a G_GLOBAL_VALUE.
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///
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/// e.g.
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///
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/// %g = G_GLOBAL_VALUE @x -> %g = G_GLOBAL_VALUE @x + cst
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static bool matchFoldGlobalOffset(MachineInstr &MI, MachineRegisterInfo &MRI,
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std::pair<uint64_t, uint64_t> &MatchInfo) {
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assert(MI.getOpcode() == TargetOpcode::G_GLOBAL_VALUE);
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MachineFunction &MF = *MI.getMF();
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auto &GlobalOp = MI.getOperand(1);
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auto *GV = GlobalOp.getGlobal();
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// Don't allow anything that could represent offsets etc.
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if (MF.getSubtarget<AArch64Subtarget>().ClassifyGlobalReference(
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GV, MF.getTarget()) != AArch64II::MO_NO_FLAG)
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return false;
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// Look for a G_GLOBAL_VALUE only used by G_PTR_ADDs against constants:
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//
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// %g = G_GLOBAL_VALUE @x
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// %ptr1 = G_PTR_ADD %g, cst1
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// %ptr2 = G_PTR_ADD %g, cst2
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// ...
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// %ptrN = G_PTR_ADD %g, cstN
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//
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// Identify the *smallest* constant. We want to be able to form this:
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//
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// %offset_g = G_GLOBAL_VALUE @x + min_cst
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// %g = G_PTR_ADD %offset_g, -min_cst
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// %ptr1 = G_PTR_ADD %g, cst1
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// ...
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Register Dst = MI.getOperand(0).getReg();
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uint64_t MinOffset = -1ull;
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for (auto &UseInstr : MRI.use_nodbg_instructions(Dst)) {
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if (UseInstr.getOpcode() != TargetOpcode::G_PTR_ADD)
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return false;
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auto Cst =
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getConstantVRegValWithLookThrough(UseInstr.getOperand(2).getReg(), MRI);
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if (!Cst)
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return false;
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MinOffset = std::min(MinOffset, Cst->Value.getZExtValue());
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}
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// Require that the new offset is larger than the existing one to avoid
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// infinite loops.
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uint64_t CurrOffset = GlobalOp.getOffset();
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uint64_t NewOffset = MinOffset + CurrOffset;
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if (NewOffset <= CurrOffset)
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return false;
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// Check whether folding this offset is legal. It must not go out of bounds of
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// the referenced object to avoid violating the code model, and must be
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// smaller than 2^21 because this is the largest offset expressible in all
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// object formats.
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//
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// This check also prevents us from folding negative offsets, which will end
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// up being treated in the same way as large positive ones. They could also
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// cause code model violations, and aren't really common enough to matter.
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if (NewOffset >= (1 << 21))
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return false;
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Type *T = GV->getValueType();
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if (!T->isSized() ||
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NewOffset > GV->getParent()->getDataLayout().getTypeAllocSize(T))
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return false;
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MatchInfo = std::make_pair(NewOffset, MinOffset);
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return true;
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}
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static bool applyFoldGlobalOffset(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B,
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GISelChangeObserver &Observer,
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std::pair<uint64_t, uint64_t> &MatchInfo) {
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// Change:
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//
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// %g = G_GLOBAL_VALUE @x
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// %ptr1 = G_PTR_ADD %g, cst1
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// %ptr2 = G_PTR_ADD %g, cst2
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// ...
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// %ptrN = G_PTR_ADD %g, cstN
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//
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// To:
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//
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// %offset_g = G_GLOBAL_VALUE @x + min_cst
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// %g = G_PTR_ADD %offset_g, -min_cst
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// %ptr1 = G_PTR_ADD %g, cst1
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// ...
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// %ptrN = G_PTR_ADD %g, cstN
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//
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// Then, the original G_PTR_ADDs should be folded later on so that they look
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// like this:
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//
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// %ptrN = G_PTR_ADD %offset_g, cstN - min_cst
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uint64_t Offset, MinOffset;
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std::tie(Offset, MinOffset) = MatchInfo;
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B.setInstrAndDebugLoc(MI);
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Observer.changingInstr(MI);
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auto &GlobalOp = MI.getOperand(1);
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auto *GV = GlobalOp.getGlobal();
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GlobalOp.ChangeToGA(GV, Offset, GlobalOp.getTargetFlags());
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Register Dst = MI.getOperand(0).getReg();
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Register NewGVDst = MRI.cloneVirtualRegister(Dst);
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MI.getOperand(0).setReg(NewGVDst);
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Observer.changedInstr(MI);
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B.buildPtrAdd(
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Dst, NewGVDst,
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B.buildConstant(LLT::scalar(64), -static_cast<int64_t>(MinOffset)));
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return true;
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}
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class AArch64PreLegalizerCombinerHelperState {
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protected:
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CombinerHelper &Helper;
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@ -0,0 +1,241 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple aarch64-unknown-unknown -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=DEFAULT,CHECK
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# RUN: llc -mtriple aarch64-apple-darwin -code-model=large -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=LARGE-MACHO,CHECK
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# RUN: llc -mtriple aarch64-apple-darwin -code-model=small -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=SMALL-MACHO,CHECK
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# RUN: llc -mtriple aarch64-linux-elf -code-model=large -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=LARGE-ELF,CHECK
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# RUN: llc -mtriple aarch64-linux-elf -code-model=tiny -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=TINY,CHECK
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# RUN: llc -mtriple aarch64-windows-coff -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=WINDOWS,CHECK
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# Each of these tests has a trivial pattern for folding a G_PTR_ADD into a
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# G_GLOBAL_VALUE.
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#
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# Check that given different code models/target features, we do/don't fold.
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--- |
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@external_linkage = external hidden global i32
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@common_linkage = common local_unnamed_addr global i32 0, align 4
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@internal_linkage = internal unnamed_addr global i32 0, align 4
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@extern_weak_linkage = extern_weak hidden global i32
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@dll_import = external dllimport global i32
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define void @test_external_linkage() { ret void }
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define void @test_internal_linkage() { ret void }
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define void @test_common_linkage() { ret void }
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define void @test_extern_weak_linkage() { ret void }
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define void @never_fold_tagged_globals() #0 { ret void }
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define void @test_dll_import() { ret void }
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attributes #0 = { "target-features"="+tagged-globals" }
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...
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---
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name: test_external_linkage
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alignment: 4
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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; Large + Mach-O goes via GOT, so we can't fold.
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; DEFAULT-LABEL: name: test_external_linkage
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; DEFAULT: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @external_linkage + 1
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; DEFAULT: $x0 = COPY [[GV]](p0)
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; DEFAULT: RET_ReallyLR implicit $x0
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; LARGE-MACHO-LABEL: name: test_external_linkage
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; LARGE-MACHO: %global:_(p0) = G_GLOBAL_VALUE @external_linkage
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; LARGE-MACHO: %imm:_(s64) = G_CONSTANT i64 1
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; LARGE-MACHO: %ptr_add:_(p0) = G_PTR_ADD %global, %imm(s64)
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; LARGE-MACHO: $x0 = COPY %ptr_add(p0)
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; LARGE-MACHO: RET_ReallyLR implicit $x0
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; SMALL-MACHO-LABEL: name: test_external_linkage
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; SMALL-MACHO: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @external_linkage + 1
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; SMALL-MACHO: $x0 = COPY [[GV]](p0)
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; SMALL-MACHO: RET_ReallyLR implicit $x0
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; LARGE-ELF-LABEL: name: test_external_linkage
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; LARGE-ELF: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @external_linkage + 1
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; LARGE-ELF: $x0 = COPY [[GV]](p0)
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; LARGE-ELF: RET_ReallyLR implicit $x0
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; TINY-LABEL: name: test_external_linkage
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; TINY: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @external_linkage + 1
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; TINY: $x0 = COPY [[GV]](p0)
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; TINY: RET_ReallyLR implicit $x0
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; WINDOWS-LABEL: name: test_external_linkage
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; WINDOWS: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @external_linkage + 1
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; WINDOWS: $x0 = COPY [[GV]](p0)
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; WINDOWS: RET_ReallyLR implicit $x0
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%global:_(p0) = G_GLOBAL_VALUE @external_linkage
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%imm:_(s64) = G_CONSTANT i64 1
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%ptr_add:_(p0) = G_PTR_ADD %global, %imm(s64)
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$x0 = COPY %ptr_add(p0)
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RET_ReallyLR implicit $x0
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...
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---
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name: test_internal_linkage
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alignment: 4
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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; Large + Mach-O goes via GOT, so we can't fold.
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; DEFAULT-LABEL: name: test_internal_linkage
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; DEFAULT: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @internal_linkage + 1
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; DEFAULT: $x0 = COPY [[GV]](p0)
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; DEFAULT: RET_ReallyLR implicit $x0
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; LARGE-MACHO-LABEL: name: test_internal_linkage
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; LARGE-MACHO: %global:_(p0) = G_GLOBAL_VALUE @internal_linkage
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; LARGE-MACHO: %imm:_(s64) = G_CONSTANT i64 1
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; LARGE-MACHO: %ptr_add:_(p0) = G_PTR_ADD %global, %imm(s64)
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; LARGE-MACHO: $x0 = COPY %ptr_add(p0)
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; LARGE-MACHO: RET_ReallyLR implicit $x0
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; SMALL-MACHO-LABEL: name: test_internal_linkage
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; SMALL-MACHO: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @internal_linkage + 1
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; SMALL-MACHO: $x0 = COPY [[GV]](p0)
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; SMALL-MACHO: RET_ReallyLR implicit $x0
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; LARGE-ELF-LABEL: name: test_internal_linkage
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; LARGE-ELF: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @internal_linkage + 1
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; LARGE-ELF: $x0 = COPY [[GV]](p0)
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; LARGE-ELF: RET_ReallyLR implicit $x0
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; TINY-LABEL: name: test_internal_linkage
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; TINY: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @internal_linkage + 1
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; TINY: $x0 = COPY [[GV]](p0)
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; TINY: RET_ReallyLR implicit $x0
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; WINDOWS-LABEL: name: test_internal_linkage
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; WINDOWS: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @internal_linkage + 1
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; WINDOWS: $x0 = COPY [[GV]](p0)
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; WINDOWS: RET_ReallyLR implicit $x0
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%global:_(p0) = G_GLOBAL_VALUE @internal_linkage
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%imm:_(s64) = G_CONSTANT i64 1
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%ptr_add:_(p0) = G_PTR_ADD %global, %imm(s64)
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$x0 = COPY %ptr_add(p0)
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RET_ReallyLR implicit $x0
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...
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---
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name: test_common_linkage
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alignment: 4
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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; DEFAULT-LABEL: name: test_common_linkage
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; DEFAULT: %global:_(p0) = G_GLOBAL_VALUE @common_linkage
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; DEFAULT: %imm:_(s64) = G_CONSTANT i64 1
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; DEFAULT: %ptr_add:_(p0) = G_PTR_ADD %global, %imm(s64)
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; DEFAULT: $x0 = COPY %ptr_add(p0)
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; DEFAULT: RET_ReallyLR implicit $x0
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; LARGE-MACHO-LABEL: name: test_common_linkage
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; LARGE-MACHO: %global:_(p0) = G_GLOBAL_VALUE @common_linkage
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; LARGE-MACHO: %imm:_(s64) = G_CONSTANT i64 1
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; LARGE-MACHO: %ptr_add:_(p0) = G_PTR_ADD %global, %imm(s64)
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; LARGE-MACHO: $x0 = COPY %ptr_add(p0)
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; LARGE-MACHO: RET_ReallyLR implicit $x0
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; SMALL-MACHO-LABEL: name: test_common_linkage
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; SMALL-MACHO: %global:_(p0) = G_GLOBAL_VALUE @common_linkage
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; SMALL-MACHO: %imm:_(s64) = G_CONSTANT i64 1
|
||||
; SMALL-MACHO: %ptr_add:_(p0) = G_PTR_ADD %global, %imm(s64)
|
||||
; SMALL-MACHO: $x0 = COPY %ptr_add(p0)
|
||||
; SMALL-MACHO: RET_ReallyLR implicit $x0
|
||||
; LARGE-ELF-LABEL: name: test_common_linkage
|
||||
; LARGE-ELF: %global:_(p0) = G_GLOBAL_VALUE @common_linkage
|
||||
; LARGE-ELF: %imm:_(s64) = G_CONSTANT i64 1
|
||||
; LARGE-ELF: %ptr_add:_(p0) = G_PTR_ADD %global, %imm(s64)
|
||||
; LARGE-ELF: $x0 = COPY %ptr_add(p0)
|
||||
; LARGE-ELF: RET_ReallyLR implicit $x0
|
||||
; TINY-LABEL: name: test_common_linkage
|
||||
; TINY: %global:_(p0) = G_GLOBAL_VALUE @common_linkage
|
||||
; TINY: %imm:_(s64) = G_CONSTANT i64 1
|
||||
; TINY: %ptr_add:_(p0) = G_PTR_ADD %global, %imm(s64)
|
||||
; TINY: $x0 = COPY %ptr_add(p0)
|
||||
; TINY: RET_ReallyLR implicit $x0
|
||||
; WINDOWS-LABEL: name: test_common_linkage
|
||||
; WINDOWS: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @common_linkage + 1
|
||||
; WINDOWS: $x0 = COPY [[GV]](p0)
|
||||
; WINDOWS: RET_ReallyLR implicit $x0
|
||||
%global:_(p0) = G_GLOBAL_VALUE @common_linkage
|
||||
%imm:_(s64) = G_CONSTANT i64 1
|
||||
%ptr_add:_(p0) = G_PTR_ADD %global, %imm(s64)
|
||||
$x0 = COPY %ptr_add(p0)
|
||||
RET_ReallyLR implicit $x0
|
||||
|
||||
...
|
||||
---
|
||||
name: test_extern_weak_linkage
|
||||
alignment: 4
|
||||
tracksRegLiveness: true
|
||||
machineFunctionInfo: {}
|
||||
body: |
|
||||
bb.0:
|
||||
; DEFAULT-LABEL: name: test_extern_weak_linkage
|
||||
; DEFAULT: %global:_(p0) = G_GLOBAL_VALUE @extern_weak_linkage
|
||||
; DEFAULT: %imm:_(s64) = G_CONSTANT i64 1
|
||||
; DEFAULT: %ptr_add:_(p0) = G_PTR_ADD %global, %imm(s64)
|
||||
; DEFAULT: $x0 = COPY %ptr_add(p0)
|
||||
; DEFAULT: RET_ReallyLR implicit $x0
|
||||
; LARGE-MACHO-LABEL: name: test_extern_weak_linkage
|
||||
; LARGE-MACHO: %global:_(p0) = G_GLOBAL_VALUE @extern_weak_linkage
|
||||
; LARGE-MACHO: %imm:_(s64) = G_CONSTANT i64 1
|
||||
; LARGE-MACHO: %ptr_add:_(p0) = G_PTR_ADD %global, %imm(s64)
|
||||
; LARGE-MACHO: $x0 = COPY %ptr_add(p0)
|
||||
; LARGE-MACHO: RET_ReallyLR implicit $x0
|
||||
; SMALL-MACHO-LABEL: name: test_extern_weak_linkage
|
||||
; SMALL-MACHO: %global:_(p0) = G_GLOBAL_VALUE @extern_weak_linkage
|
||||
; SMALL-MACHO: %imm:_(s64) = G_CONSTANT i64 1
|
||||
; SMALL-MACHO: %ptr_add:_(p0) = G_PTR_ADD %global, %imm(s64)
|
||||
; SMALL-MACHO: $x0 = COPY %ptr_add(p0)
|
||||
; SMALL-MACHO: RET_ReallyLR implicit $x0
|
||||
; LARGE-ELF-LABEL: name: test_extern_weak_linkage
|
||||
; LARGE-ELF: %global:_(p0) = G_GLOBAL_VALUE @extern_weak_linkage
|
||||
; LARGE-ELF: %imm:_(s64) = G_CONSTANT i64 1
|
||||
; LARGE-ELF: %ptr_add:_(p0) = G_PTR_ADD %global, %imm(s64)
|
||||
; LARGE-ELF: $x0 = COPY %ptr_add(p0)
|
||||
; LARGE-ELF: RET_ReallyLR implicit $x0
|
||||
; TINY-LABEL: name: test_extern_weak_linkage
|
||||
; TINY: %global:_(p0) = G_GLOBAL_VALUE @extern_weak_linkage
|
||||
; TINY: %imm:_(s64) = G_CONSTANT i64 1
|
||||
; TINY: %ptr_add:_(p0) = G_PTR_ADD %global, %imm(s64)
|
||||
; TINY: $x0 = COPY %ptr_add(p0)
|
||||
; TINY: RET_ReallyLR implicit $x0
|
||||
; WINDOWS-LABEL: name: test_extern_weak_linkage
|
||||
; WINDOWS: %global:_(p0) = G_GLOBAL_VALUE @extern_weak_linkage
|
||||
; WINDOWS: %imm:_(s64) = G_CONSTANT i64 1
|
||||
; WINDOWS: %ptr_add:_(p0) = G_PTR_ADD %global, %imm(s64)
|
||||
; WINDOWS: $x0 = COPY %ptr_add(p0)
|
||||
; WINDOWS: RET_ReallyLR implicit $x0
|
||||
%global:_(p0) = G_GLOBAL_VALUE @extern_weak_linkage
|
||||
%imm:_(s64) = G_CONSTANT i64 1
|
||||
%ptr_add:_(p0) = G_PTR_ADD %global, %imm(s64)
|
||||
$x0 = COPY %ptr_add(p0)
|
||||
RET_ReallyLR implicit $x0
|
||||
|
||||
...
|
||||
---
|
||||
name: never_fold_tagged_globals
|
||||
alignment: 4
|
||||
tracksRegLiveness: true
|
||||
machineFunctionInfo: {}
|
||||
body: |
|
||||
bb.0:
|
||||
; CHECK-LABEL: name: never_fold_tagged_globals
|
||||
; CHECK-NOT: %global:_(p0) = G_GLOBAL_VALUE @external_linkage + 1
|
||||
%global:_(p0) = G_GLOBAL_VALUE @external_linkage
|
||||
%imm:_(s64) = G_CONSTANT i64 1
|
||||
%ptr_add:_(p0) = G_PTR_ADD %global, %imm(s64)
|
||||
$x0 = COPY %ptr_add(p0)
|
||||
RET_ReallyLR implicit $x0
|
||||
|
||||
...
|
||||
---
|
||||
name: test_dll_import
|
||||
alignment: 4
|
||||
tracksRegLiveness: true
|
||||
machineFunctionInfo: {}
|
||||
body: |
|
||||
bb.0:
|
||||
; CHECK-LABEL: name: test_dll_import
|
||||
; CHECK-NOT: %global:_(p0) = G_GLOBAL_VALUE @dll_import + 1
|
||||
%global:_(p0) = G_GLOBAL_VALUE @dll_import
|
||||
%imm:_(s64) = G_CONSTANT i64 1
|
||||
%ptr_add:_(p0) = G_PTR_ADD %global, %imm(s64)
|
||||
$x0 = COPY %ptr_add(p0)
|
||||
RET_ReallyLR implicit $x0
|
||||
284
test/CodeGen/AArch64/GlobalISel/fold-global-offsets.mir
Normal file
284
test/CodeGen/AArch64/GlobalISel/fold-global-offsets.mir
Normal file
@ -0,0 +1,284 @@
|
||||
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
||||
# RUN: llc -mtriple aarch64-apple-darwin -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
|
||||
|
||||
--- |
|
||||
@g = external hidden global i32
|
||||
|
||||
%opaque = type opaque
|
||||
@unsized = external hidden global %opaque
|
||||
|
||||
define void @one_ptr_add() { ret void }
|
||||
define void @add_to_offset() { ret void }
|
||||
define void @two_ptr_adds_same_offset() { ret void }
|
||||
define void @two_ptr_adds_different_offset() { ret void }
|
||||
define void @ptr_add_chain() { ret void }
|
||||
|
||||
define void @dont_fold_negative_offset() { ret void }
|
||||
define void @dont_min_offset_less_than_curr_offset() { ret void }
|
||||
define void @dont_fold_max_offset() { ret void }
|
||||
define void @dont_fold_offset_larger_than_type_alloc() { ret void }
|
||||
define void @dont_fold_unsized_type() { ret void }
|
||||
...
|
||||
---
|
||||
name: one_ptr_add
|
||||
alignment: 4
|
||||
tracksRegLiveness: true
|
||||
machineFunctionInfo: {}
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $x0
|
||||
|
||||
; We should fold the offset 1 into the G_GLOBAL_VALUE.
|
||||
|
||||
; CHECK-LABEL: name: one_ptr_add
|
||||
; CHECK: liveins: $x0
|
||||
; CHECK: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @g + 1
|
||||
; CHECK: $x0 = COPY [[GV]](p0)
|
||||
; CHECK: RET_ReallyLR implicit $x0
|
||||
%global:_(p0) = G_GLOBAL_VALUE @g
|
||||
%offset:_(s64) = G_CONSTANT i64 1
|
||||
%ptr_add:_(p0) = G_PTR_ADD %global, %offset(s64)
|
||||
$x0 = COPY %ptr_add
|
||||
RET_ReallyLR implicit $x0
|
||||
|
||||
...
|
||||
---
|
||||
name: add_to_offset
|
||||
alignment: 4
|
||||
tracksRegLiveness: true
|
||||
machineFunctionInfo: {}
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $x0
|
||||
|
||||
; We should fold the offset 1 into the G_GLOBAL_VALUE, resulting in a
|
||||
; final offset of 4.
|
||||
|
||||
; CHECK-LABEL: name: add_to_offset
|
||||
; CHECK: liveins: $x0
|
||||
; CHECK: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @g + 4
|
||||
; CHECK: $x0 = COPY [[GV]](p0)
|
||||
; CHECK: RET_ReallyLR implicit $x0
|
||||
%global:_(p0) = G_GLOBAL_VALUE @g + 3
|
||||
%offset:_(s64) = G_CONSTANT i64 1
|
||||
%ptr_add:_(p0) = G_PTR_ADD %global, %offset(s64)
|
||||
$x0 = COPY %ptr_add
|
||||
RET_ReallyLR implicit $x0
|
||||
|
||||
...
|
||||
---
|
||||
name: two_ptr_adds_same_offset
|
||||
alignment: 4
|
||||
tracksRegLiveness: true
|
||||
machineFunctionInfo: {}
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $x0, $x1
|
||||
|
||||
; We're allowed to have more than one G_PTR_ADD use. We should fold 1 into
|
||||
; the G_GLOBAL_VALUE's offset.
|
||||
|
||||
; CHECK-LABEL: name: two_ptr_adds_same_offset
|
||||
; CHECK: liveins: $x0, $x1
|
||||
; CHECK: %val1:_(s64) = COPY $x0
|
||||
; CHECK: %val2:_(s64) = COPY $x1
|
||||
; CHECK: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @g + 1
|
||||
; CHECK: G_STORE %val1(s64), [[GV]](p0) :: (store 8)
|
||||
; CHECK: G_STORE %val2(s64), [[GV]](p0) :: (store 8)
|
||||
; CHECK: RET_ReallyLR implicit $x0
|
||||
%val1:_(s64) = COPY $x0
|
||||
%val2:_(s64) = COPY $x1
|
||||
%global:_(p0) = G_GLOBAL_VALUE @g
|
||||
%offset:_(s64) = G_CONSTANT i64 1
|
||||
%ptr_add1:_(p0) = G_PTR_ADD %global, %offset(s64)
|
||||
%ptr_add2:_(p0) = G_PTR_ADD %global, %offset(s64)
|
||||
G_STORE %val1:_(s64), %ptr_add1 :: (store 8)
|
||||
G_STORE %val2:_(s64), %ptr_add2 :: (store 8)
|
||||
RET_ReallyLR implicit $x0
|
||||
|
||||
...
|
||||
---
|
||||
name: two_ptr_adds_different_offset
|
||||
alignment: 4
|
||||
tracksRegLiveness: true
|
||||
machineFunctionInfo: {}
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $x0, $x1
|
||||
; The lowest offset G_PTR_ADD (2) should be folded into the G_GLOBAL_VALUE.
|
||||
;
|
||||
; The other G_PTR_ADD should have its offset decremented by 2.
|
||||
|
||||
; CHECK-LABEL: name: two_ptr_adds_different_offset
|
||||
; CHECK: liveins: $x0, $x1
|
||||
; CHECK: %val1:_(s64) = COPY $x0
|
||||
; CHECK: %val2:_(s64) = COPY $x1
|
||||
; CHECK: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @g + 2
|
||||
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
|
||||
; CHECK: %ptr_add2:_(p0) = G_PTR_ADD [[GV]], [[C]](s64)
|
||||
; CHECK: G_STORE %val1(s64), [[GV]](p0) :: (store 8)
|
||||
; CHECK: G_STORE %val2(s64), %ptr_add2(p0) :: (store 8)
|
||||
; CHECK: RET_ReallyLR implicit $x0
|
||||
%val1:_(s64) = COPY $x0
|
||||
%val2:_(s64) = COPY $x1
|
||||
%global:_(p0) = G_GLOBAL_VALUE @g
|
||||
%offset1:_(s64) = G_CONSTANT i64 2
|
||||
%offset2:_(s64) = G_CONSTANT i64 10
|
||||
%ptr_add1:_(p0) = G_PTR_ADD %global, %offset1(s64)
|
||||
%ptr_add2:_(p0) = G_PTR_ADD %global, %offset2(s64)
|
||||
G_STORE %val1:_(s64), %ptr_add1 :: (store 8)
|
||||
G_STORE %val2:_(s64), %ptr_add2 :: (store 8)
|
||||
RET_ReallyLR implicit $x0
|
||||
|
||||
...
|
||||
---
|
||||
name: ptr_add_chain
|
||||
alignment: 4
|
||||
tracksRegLiveness: true
|
||||
machineFunctionInfo: {}
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $x0
|
||||
; We should be able to fold all of the G_PTR_ADDs, except for the last one
|
||||
; into the G_GLOBAL_VALUE.
|
||||
;
|
||||
; (TypeAllocSize = 4, so the offset on the G_GLOBAL_VALUE can't go above
|
||||
; that.)
|
||||
|
||||
; CHECK-LABEL: name: ptr_add_chain
|
||||
; CHECK: liveins: $x0
|
||||
; CHECK: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @g + 1
|
||||
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
|
||||
; CHECK: %dont_fold_me:_(p0) = G_PTR_ADD [[GV]], [[C]](s64)
|
||||
; CHECK: $x0 = COPY %dont_fold_me(p0)
|
||||
; CHECK: RET_ReallyLR implicit $x0
|
||||
%global:_(p0) = G_GLOBAL_VALUE @g
|
||||
%offset:_(s64) = G_CONSTANT i64 1
|
||||
%ptr_add1:_(p0) = G_PTR_ADD %global, %offset(s64)
|
||||
%ptr_add2:_(p0) = G_PTR_ADD %ptr_add1, %offset(s64)
|
||||
%ptr_add3:_(p0) = G_PTR_ADD %ptr_add2, %offset(s64)
|
||||
%ptr_add4:_(p0) = G_PTR_ADD %ptr_add3, %offset(s64)
|
||||
%dont_fold_me:_(p0) = G_PTR_ADD %ptr_add4, %offset(s64)
|
||||
$x0 = COPY %dont_fold_me
|
||||
RET_ReallyLR implicit $x0
|
||||
|
||||
...
|
||||
---
|
||||
name: dont_fold_negative_offset
|
||||
alignment: 4
|
||||
tracksRegLiveness: true
|
||||
machineFunctionInfo: {}
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $x0
|
||||
|
||||
; Do not add negative offsets to G_GLOBAL_VALUE.
|
||||
|
||||
; CHECK-LABEL: name: dont_fold_negative_offset
|
||||
; CHECK: liveins: $x0
|
||||
; CHECK: %global:_(p0) = G_GLOBAL_VALUE @g
|
||||
; CHECK: %offset:_(s64) = G_CONSTANT i64 -1
|
||||
; CHECK: %ptr_add:_(p0) = G_PTR_ADD %global, %offset(s64)
|
||||
; CHECK: $x0 = COPY %ptr_add(p0)
|
||||
; CHECK: RET_ReallyLR implicit $x0
|
||||
%global:_(p0) = G_GLOBAL_VALUE @g
|
||||
%offset:_(s64) = G_CONSTANT i64 -1
|
||||
%ptr_add:_(p0) = G_PTR_ADD %global, %offset(s64)
|
||||
$x0 = COPY %ptr_add
|
||||
RET_ReallyLR implicit $x0
|
||||
|
||||
...
|
||||
---
|
||||
name: dont_min_offset_less_than_curr_offset
|
||||
alignment: 4
|
||||
tracksRegLiveness: true
|
||||
machineFunctionInfo: {}
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $x0
|
||||
|
||||
; Do not create smaller offsets. Ensures combine termination.
|
||||
|
||||
; CHECK-LABEL: name: dont_min_offset_less_than_curr_offset
|
||||
; CHECK: liveins: $x0
|
||||
; CHECK: %global:_(p0) = G_GLOBAL_VALUE @g + 3
|
||||
; CHECK: %offset:_(s64) = G_CONSTANT i64 -1
|
||||
; CHECK: %ptr_add:_(p0) = G_PTR_ADD %global, %offset(s64)
|
||||
; CHECK: $x0 = COPY %ptr_add(p0)
|
||||
; CHECK: RET_ReallyLR implicit $x0
|
||||
%global:_(p0) = G_GLOBAL_VALUE @g + 3
|
||||
%offset:_(s64) = G_CONSTANT i64 -1
|
||||
%ptr_add:_(p0) = G_PTR_ADD %global, %offset(s64)
|
||||
$x0 = COPY %ptr_add
|
||||
RET_ReallyLR implicit $x0
|
||||
|
||||
...
|
||||
---
|
||||
name: dont_fold_max_offset
|
||||
alignment: 4
|
||||
tracksRegLiveness: true
|
||||
machineFunctionInfo: {}
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $x0
|
||||
|
||||
; 1 << 21 is the largest offset expressible in all object formats.
|
||||
; Don't fold it.
|
||||
|
||||
; CHECK-LABEL: name: dont_fold_max_offset
|
||||
; CHECK: liveins: $x0
|
||||
; CHECK: %global:_(p0) = G_GLOBAL_VALUE @g
|
||||
; CHECK: %offset:_(s64) = G_CONSTANT i64 4292870144
|
||||
; CHECK: %ptr_add:_(p0) = G_PTR_ADD %global, %offset(s64)
|
||||
; CHECK: $x0 = COPY %ptr_add(p0)
|
||||
; CHECK: RET_ReallyLR implicit $x0
|
||||
%global:_(p0) = G_GLOBAL_VALUE @g
|
||||
%offset:_(s64) = G_CONSTANT i64 4292870144 ; 1 << 21
|
||||
%ptr_add:_(p0) = G_PTR_ADD %global, %offset(s64)
|
||||
$x0 = COPY %ptr_add
|
||||
RET_ReallyLR implicit $x0
|
||||
|
||||
...
|
||||
---
|
||||
name: dont_fold_offset_larger_than_type_alloc
|
||||
alignment: 4
|
||||
tracksRegLiveness: true
|
||||
machineFunctionInfo: {}
|
||||
body: |
|
||||
bb.0:
|
||||
|
||||
; Type alloc size = 4, offset = 16. Don't fold.
|
||||
|
||||
; CHECK-LABEL: name: dont_fold_offset_larger_than_type_alloc
|
||||
; CHECK: %global:_(p0) = G_GLOBAL_VALUE @g
|
||||
; CHECK: %offset:_(s64) = G_CONSTANT i64 16
|
||||
; CHECK: %ptr_add:_(p0) = G_PTR_ADD %global, %offset(s64)
|
||||
; CHECK: $x0 = COPY %ptr_add(p0)
|
||||
; CHECK: RET_ReallyLR implicit $x0
|
||||
%global:_(p0) = G_GLOBAL_VALUE @g
|
||||
%offset:_(s64) = G_CONSTANT i64 16
|
||||
%ptr_add:_(p0) = G_PTR_ADD %global, %offset(s64)
|
||||
$x0 = COPY %ptr_add(p0)
|
||||
RET_ReallyLR implicit $x0
|
||||
|
||||
...
|
||||
---
|
||||
name: dont_fold_unsized_type
|
||||
alignment: 4
|
||||
tracksRegLiveness: true
|
||||
machineFunctionInfo: {}
|
||||
body: |
|
||||
bb.0:
|
||||
; Check that we don't touch unsized globals.
|
||||
|
||||
; CHECK-LABEL: name: dont_fold_unsized_type
|
||||
; CHECK: %global:_(p0) = G_GLOBAL_VALUE @unsized
|
||||
; CHECK: %offset:_(s64) = G_CONSTANT i64 16
|
||||
; CHECK: %ptr_add:_(p0) = G_PTR_ADD %global, %offset(s64)
|
||||
; CHECK: $x0 = COPY %ptr_add(p0)
|
||||
; CHECK: RET_ReallyLR implicit $x0
|
||||
%global:_(p0) = G_GLOBAL_VALUE @unsized
|
||||
%offset:_(s64) = G_CONSTANT i64 16
|
||||
%ptr_add:_(p0) = G_PTR_ADD %global, %offset(s64)
|
||||
$x0 = COPY %ptr_add(p0)
|
||||
RET_ReallyLR implicit $x0
|
||||
@ -6,6 +6,7 @@
|
||||
target triple = "aarch64--"
|
||||
@var = external global i8
|
||||
define i8* @test_global() { ret i8* undef }
|
||||
define i8* @test_global_with_offset() { ret i8* undef }
|
||||
...
|
||||
---
|
||||
name: test_global
|
||||
@ -17,15 +18,6 @@ body: |
|
||||
; We don't want to lower to G_ADD_LOW when we need a GOT access, or when the code
|
||||
; model isn't 'Small'.
|
||||
|
||||
; CHECK-LABEL: name: test_global
|
||||
; CHECK: [[ADRP:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @var
|
||||
; CHECK: [[ADD_LOW:%[0-9]+]]:_(p0) = G_ADD_LOW [[ADRP]](p0), target-flags(aarch64-pageoff, aarch64-nc) @var
|
||||
; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[ADD_LOW]](p0)
|
||||
; CHECK: $x0 = COPY [[PTRTOINT]](s64)
|
||||
; CMLARGE-LABEL: name: test_global
|
||||
; CMLARGE: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var
|
||||
; CMLARGE: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[GV]](p0)
|
||||
; CMLARGE: $x0 = COPY [[PTRTOINT]](s64)
|
||||
; PIC-LABEL: name: test_global
|
||||
; PIC: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var
|
||||
; PIC: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[GV]](p0)
|
||||
@ -34,3 +26,17 @@ body: |
|
||||
%1:_(s64) = G_PTRTOINT %0
|
||||
$x0 = COPY %1
|
||||
...
|
||||
---
|
||||
name: test_global_with_offset
|
||||
registers:
|
||||
- { id: 0, class: _ }
|
||||
body: |
|
||||
bb.0:
|
||||
; PIC-LABEL: name: test_global_with_offset
|
||||
; PIC: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var + 1
|
||||
; PIC: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[GV]](p0)
|
||||
; PIC: $x0 = COPY [[PTRTOINT]](s64)
|
||||
%0(p0) = G_GLOBAL_VALUE @var + 1
|
||||
%1:_(s64) = G_PTRTOINT %0
|
||||
$x0 = COPY %1
|
||||
...
|
||||
|
||||
@ -7,6 +7,7 @@
|
||||
target triple = "aarch64--"
|
||||
@var = external dso_local global i8
|
||||
define i8* @test_global() { ret i8* undef }
|
||||
define i8* @test_global_with_offset() { ret i8* undef }
|
||||
...
|
||||
---
|
||||
name: test_global
|
||||
@ -17,16 +18,11 @@ body: |
|
||||
|
||||
; We don't want to lower to G_ADD_LOW when we need a GOT access, or when the code
|
||||
; model isn't 'Small'.
|
||||
|
||||
; CHECK-LABEL: name: test_global
|
||||
; CHECK: [[ADRP:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @var
|
||||
; CHECK: [[ADD_LOW:%[0-9]+]]:_(p0) = G_ADD_LOW [[ADRP]](p0), target-flags(aarch64-pageoff, aarch64-nc) @var
|
||||
; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[ADD_LOW]](p0)
|
||||
; CHECK: $x0 = COPY [[PTRTOINT]](s64)
|
||||
; PIC-LABEL: name: test_global
|
||||
; PIC: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var
|
||||
; PIC: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[GV]](p0)
|
||||
; PIC: $x0 = COPY [[PTRTOINT]](s64)
|
||||
; CMLARGE-LABEL: name: test_global
|
||||
; CMLARGE: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var
|
||||
; CMLARGE: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[GV]](p0)
|
||||
@ -35,3 +31,23 @@ body: |
|
||||
%1:_(s64) = G_PTRTOINT %0
|
||||
$x0 = COPY %1
|
||||
...
|
||||
---
|
||||
name: test_global_with_offset
|
||||
body: |
|
||||
bb.0:
|
||||
; When we legalize into ADRP + G_ADD_LOW, both should inherit the offset
|
||||
; from the original G_GLOBAL_VALUE.
|
||||
;
|
||||
; CHECK-LABEL: name: test_global_with_offset
|
||||
; CHECK: [[ADRP:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @var + 1
|
||||
; CHECK: [[ADD_LOW:%[0-9]+]]:_(p0) = G_ADD_LOW [[ADRP]](p0), target-flags(aarch64-pageoff, aarch64-nc) @var + 1
|
||||
; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[ADD_LOW]](p0)
|
||||
; CHECK: $x0 = COPY [[PTRTOINT]](s64)
|
||||
; CMLARGE-LABEL: name: test_global_with_offset
|
||||
; CMLARGE: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var + 1
|
||||
; CMLARGE: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[GV]](p0)
|
||||
; CMLARGE: $x0 = COPY [[PTRTOINT]](s64)
|
||||
%0:_(p0) = G_GLOBAL_VALUE @var + 1
|
||||
%1:_(s64) = G_PTRTOINT %0
|
||||
$x0 = COPY %1
|
||||
...
|
||||
|
||||
70
test/CodeGen/AArch64/GlobalISel/select-add-low.mir
Normal file
70
test/CodeGen/AArch64/GlobalISel/select-add-low.mir
Normal file
@ -0,0 +1,70 @@
|
||||
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
||||
# RUN: llc -mtriple=aarch64 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
|
||||
|
||||
--- |
|
||||
|
||||
@x = external hidden local_unnamed_addr global i32*, align 8
|
||||
|
||||
define void @select_add_low_without_offset() { ret void }
|
||||
define void @select_add_low_with_offset() { ret void }
|
||||
define void @select_add_low_without_adrp() { ret void }
|
||||
|
||||
...
|
||||
---
|
||||
name: select_add_low_without_offset
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
tracksRegLiveness: true
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $x0
|
||||
; CHECK-LABEL: name: select_add_low_without_offset
|
||||
; CHECK: liveins: $x0
|
||||
; CHECK: %add_low:gpr64 = MOVaddr target-flags(aarch64-page) @x, target-flags(aarch64-pageoff, aarch64-nc) @x
|
||||
; CHECK: $x0 = COPY %add_low
|
||||
; CHECK: RET_ReallyLR implicit $x0
|
||||
%copy:gpr(p0) = COPY $x0
|
||||
%adrp:gpr64(p0) = ADRP target-flags(aarch64-page) @x
|
||||
%add_low:gpr(p0) = G_ADD_LOW %adrp(p0), target-flags(aarch64-pageoff, aarch64-nc) @x
|
||||
$x0 = COPY %add_low
|
||||
RET_ReallyLR implicit $x0
|
||||
|
||||
...
|
||||
---
|
||||
name: select_add_low_with_offset
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
tracksRegLiveness: true
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $x0
|
||||
; CHECK-LABEL: name: select_add_low_with_offset
|
||||
; CHECK: liveins: $x0
|
||||
; CHECK: %add_low:gpr64 = MOVaddr target-flags(aarch64-page) @x + 1, target-flags(aarch64-pageoff, aarch64-nc) @x + 1
|
||||
; CHECK: $x0 = COPY %add_low
|
||||
; CHECK: RET_ReallyLR implicit $x0
|
||||
%copy:gpr(p0) = COPY $x0
|
||||
%adrp:gpr64(p0) = ADRP target-flags(aarch64-page) @x + 1
|
||||
%add_low:gpr(p0) = G_ADD_LOW %adrp(p0), target-flags(aarch64-pageoff, aarch64-nc) @x + 1
|
||||
$x0 = COPY %add_low
|
||||
RET_ReallyLR implicit $x0
|
||||
|
||||
...
|
||||
---
|
||||
name: select_add_low_without_adrp
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
tracksRegLiveness: true
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $x0
|
||||
; CHECK-LABEL: name: select_add_low_without_adrp
|
||||
; CHECK: liveins: $x0
|
||||
; CHECK: %ptr:gpr64sp = COPY $x0
|
||||
; CHECK: %add_low:gpr64sp = ADDXri %ptr, target-flags(aarch64-pageoff, aarch64-nc) @x, 0
|
||||
; CHECK: $x0 = COPY %add_low
|
||||
; CHECK: RET_ReallyLR implicit $x0
|
||||
%ptr:gpr(p0) = COPY $x0
|
||||
%add_low:gpr(p0) = G_ADD_LOW %ptr(p0), target-flags(aarch64-pageoff, aarch64-nc) @x
|
||||
$x0 = COPY %add_low
|
||||
RET_ReallyLR implicit $x0
|
||||
38
test/CodeGen/AArch64/GlobalISel/select-gv-with-offset.mir
Normal file
38
test/CodeGen/AArch64/GlobalISel/select-gv-with-offset.mir
Normal file
@ -0,0 +1,38 @@
|
||||
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
||||
# RUN: llc -mtriple=aarch64 -code-model=large -run-pass=instruction-select -verify-machineinstrs -O0 %s -o - | FileCheck %s --check-prefix=LARGE
|
||||
# RUN: llc -mtriple=aarch64 -code-model=small -run-pass=instruction-select -verify-machineinstrs -O0 %s -o - | FileCheck %s --check-prefix=SMALL
|
||||
# RUN: llc -mtriple=aarch64 -code-model=tiny -run-pass=instruction-select -verify-machineinstrs -O0 %s -o - | FileCheck %s --check-prefix=TINY
|
||||
|
||||
--- |
|
||||
@g = external hidden global i32
|
||||
define void @select_gv_with_offset() { ret void }
|
||||
...
|
||||
---
|
||||
name: select_gv_with_offset
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
tracksRegLiveness: true
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $x0
|
||||
; LARGE-LABEL: name: select_gv_with_offset
|
||||
; LARGE: liveins: $x0
|
||||
; LARGE: [[MOVZXi:%[0-9]+]]:gpr64 = MOVZXi target-flags(aarch64-g0, aarch64-nc) @g + 1, 0
|
||||
; LARGE: [[MOVKXi:%[0-9]+]]:gpr64 = MOVKXi [[MOVZXi]], target-flags(aarch64-g1, aarch64-nc) @g + 1, 16
|
||||
; LARGE: [[MOVKXi1:%[0-9]+]]:gpr64 = MOVKXi [[MOVKXi]], target-flags(aarch64-g2, aarch64-nc) @g + 1, 32
|
||||
; LARGE: %g:gpr64 = MOVKXi [[MOVKXi1]], target-flags(aarch64-g3) @g + 1, 48
|
||||
; LARGE: $x0 = COPY %g
|
||||
; LARGE: RET_ReallyLR implicit $x0
|
||||
; SMALL-LABEL: name: select_gv_with_offset
|
||||
; SMALL: liveins: $x0
|
||||
; SMALL: %g:gpr64 = MOVaddr target-flags(aarch64-page) @g + 1, target-flags(aarch64-pageoff, aarch64-nc) @g + 1
|
||||
; SMALL: $x0 = COPY %g
|
||||
; SMALL: RET_ReallyLR implicit $x0
|
||||
; TINY-LABEL: name: select_gv_with_offset
|
||||
; TINY: liveins: $x0
|
||||
; TINY: %g:gpr64 = ADR @g + 1
|
||||
; TINY: $x0 = COPY %g
|
||||
; TINY: RET_ReallyLR implicit $x0
|
||||
%g:gpr(p0) = G_GLOBAL_VALUE @g + 1
|
||||
$x0 = COPY %g(p0)
|
||||
RET_ReallyLR implicit $x0
|
||||
@ -41,7 +41,8 @@
|
||||
|
||||
@x = external hidden local_unnamed_addr global i32*, align 8
|
||||
define void @store_adrp_add_low() { ret void }
|
||||
|
||||
define void @store_adrp_add_low_foldable_offset() { ret void }
|
||||
define void @store_adrp_add_low_unfoldable_offset() { ret void }
|
||||
...
|
||||
|
||||
---
|
||||
@ -622,3 +623,43 @@ body: |
|
||||
%adrp:gpr64(p0) = ADRP target-flags(aarch64-page) @x
|
||||
%add_low:gpr(p0) = G_ADD_LOW %adrp(p0), target-flags(aarch64-pageoff, aarch64-nc) @x
|
||||
G_STORE %copy(p0), %add_low(p0) :: (store 8 into @x)
|
||||
|
||||
...
|
||||
---
|
||||
name: store_adrp_add_low_foldable_offset
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
tracksRegLiveness: true
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $x0
|
||||
; CHECK-LABEL: name: store_adrp_add_low_foldable_offset
|
||||
; CHECK: liveins: $x0
|
||||
; CHECK: %copy:gpr64all = COPY $x0
|
||||
; CHECK: %adrp:gpr64common = ADRP target-flags(aarch64-page) @x + 8
|
||||
; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY %copy
|
||||
; CHECK: STRXui [[COPY]], %adrp, target-flags(aarch64-pageoff, aarch64-nc) @x + 8 :: (store 8 into @x)
|
||||
%copy:gpr(p0) = COPY $x0
|
||||
%adrp:gpr64(p0) = ADRP target-flags(aarch64-page) @x + 8
|
||||
%add_low:gpr(p0) = G_ADD_LOW %adrp(p0), target-flags(aarch64-pageoff, aarch64-nc) @x + 8
|
||||
G_STORE %copy(p0), %add_low(p0) :: (store 8 into @x)
|
||||
|
||||
...
|
||||
---
|
||||
name: store_adrp_add_low_unfoldable_offset
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
tracksRegLiveness: true
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $x0
|
||||
; CHECK-LABEL: name: store_adrp_add_low_unfoldable_offset
|
||||
; CHECK: liveins: $x0
|
||||
; CHECK: %copy:gpr64all = COPY $x0
|
||||
; CHECK: %add_low:gpr64common = MOVaddr target-flags(aarch64-page) @x + 3, target-flags(aarch64-pageoff, aarch64-nc) @x + 3
|
||||
; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY %copy
|
||||
; CHECK: STRXui [[COPY]], %add_low, 0 :: (store 8 into @x)
|
||||
%copy:gpr(p0) = COPY $x0
|
||||
%adrp:gpr64(p0) = ADRP target-flags(aarch64-page) @x + 3
|
||||
%add_low:gpr(p0) = G_ADD_LOW %adrp(p0), target-flags(aarch64-pageoff, aarch64-nc) @x + 3
|
||||
G_STORE %copy(p0), %add_low(p0) :: (store 8 into @x)
|
||||
|
||||
@ -1,69 +1,152 @@
|
||||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||||
; RUN: llc < %s -mtriple=arm64-linux-gnu | FileCheck %s
|
||||
; RUN: llc < %s -global-isel -mtriple=arm64-linux-gnu | FileCheck %s --check-prefix=GISEL
|
||||
|
||||
@x1 = external hidden global [2 x i64]
|
||||
@x2 = external hidden global [16777216 x i64]
|
||||
@x3 = external hidden global { [9 x i8*], [8 x i8*] }
|
||||
|
||||
define i64 @f1() {
|
||||
; CHECK: f1:
|
||||
; CHECK: adrp x8, x1+16
|
||||
; CHECK: ldr x0, [x8, :lo12:x1+16]
|
||||
; CHECK-LABEL: f1:
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: adrp x8, x1+16
|
||||
; CHECK-NEXT: ldr x0, [x8, :lo12:x1+16]
|
||||
; CHECK-NEXT: ret
|
||||
;
|
||||
; GISEL-LABEL: f1:
|
||||
; GISEL: // %bb.0:
|
||||
; GISEL-NEXT: adrp x8, x1+16
|
||||
; GISEL-NEXT: ldr x0, [x8, :lo12:x1+16]
|
||||
; GISEL-NEXT: ret
|
||||
%l = load i64, i64* getelementptr ([2 x i64], [2 x i64]* @x1, i64 0, i64 2)
|
||||
ret i64 %l
|
||||
}
|
||||
|
||||
define i64 @f2() {
|
||||
; CHECK: f2:
|
||||
; CHECK: adrp x8, x1
|
||||
; CHECK: add x8, x8, :lo12:x1
|
||||
; CHECK: ldr x0, [x8, #24]
|
||||
; CHECK-LABEL: f2:
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: adrp x8, x1
|
||||
; CHECK-NEXT: add x8, x8, :lo12:x1
|
||||
; CHECK-NEXT: ldr x0, [x8, #24]
|
||||
; CHECK-NEXT: ret
|
||||
;
|
||||
; GISEL-LABEL: f2:
|
||||
; GISEL: // %bb.0:
|
||||
; GISEL-NEXT: adrp x8, x1
|
||||
; GISEL-NEXT: add x8, x8, :lo12:x1
|
||||
; GISEL-NEXT: ldr x0, [x8, #24]
|
||||
; GISEL-NEXT: ret
|
||||
|
||||
%l = load i64, i64* getelementptr ([2 x i64], [2 x i64]* @x1, i64 0, i64 3)
|
||||
ret i64 %l
|
||||
}
|
||||
|
||||
define i64 @f3() {
|
||||
; CHECK: f3:
|
||||
; CHECK: adrp x8, x1+1
|
||||
; CHECK: add x8, x8, :lo12:x1+1
|
||||
; CHECK: ldr x0, [x8]
|
||||
; CHECK-LABEL: f3:
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: adrp x8, x1+1
|
||||
; CHECK-NEXT: add x8, x8, :lo12:x1+1
|
||||
; CHECK-NEXT: ldr x0, [x8]
|
||||
; CHECK-NEXT: ret
|
||||
;
|
||||
; GISEL-LABEL: f3:
|
||||
; GISEL: // %bb.0:
|
||||
; GISEL-NEXT: adrp x8, x1+1
|
||||
; GISEL-NEXT: add x8, x8, :lo12:x1+1
|
||||
; GISEL-NEXT: ldr x0, [x8]
|
||||
; GISEL-NEXT: ret
|
||||
%l = load i64, i64* bitcast (i8* getelementptr (i8, i8* bitcast ([2 x i64]* @x1 to i8*), i64 1) to i64*)
|
||||
ret i64 %l
|
||||
}
|
||||
|
||||
define [2 x i64] @f4() {
|
||||
; CHECK: f4:
|
||||
; CHECK: adrp x8, x2+8
|
||||
; CHECK: add x8, x8, :lo12:x2+8
|
||||
; CHECK: ldp x0, x1, [x8]
|
||||
; FIXME: GlobalISel misses the opportunity to form a LDP here.
|
||||
;
|
||||
; CHECK-LABEL: f4:
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: adrp x8, x2+8
|
||||
; CHECK-NEXT: add x8, x8, :lo12:x2+8
|
||||
; CHECK-NEXT: ldp x0, x1, [x8]
|
||||
; CHECK-NEXT: ret
|
||||
;
|
||||
; GISEL-LABEL: f4:
|
||||
; GISEL: // %bb.0:
|
||||
; GISEL-NEXT: adrp x9, x2+8
|
||||
; GISEL-NEXT: adrp x8, x2+8
|
||||
; GISEL-NEXT: add x9, x9, :lo12:x2+8
|
||||
; GISEL-NEXT: ldr x0, [x8, :lo12:x2+8]
|
||||
; GISEL-NEXT: ldr x1, [x9, #8]
|
||||
; GISEL-NEXT: ret
|
||||
%l = load [2 x i64], [2 x i64]* bitcast (i8* getelementptr (i8, i8* bitcast ([16777216 x i64]* @x2 to i8*), i64 8) to [2 x i64]*)
|
||||
ret [2 x i64] %l
|
||||
}
|
||||
|
||||
define i64 @f5() {
|
||||
; CHECK: f5:
|
||||
; CHECK: adrp x8, x2+2097144
|
||||
; CHECK: ldr x0, [x8, :lo12:x2+2097144]
|
||||
; CHECK: ret
|
||||
; CHECK-LABEL: f5:
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: adrp x8, x2+2097144
|
||||
; CHECK-NEXT: ldr x0, [x8, :lo12:x2+2097144]
|
||||
; CHECK-NEXT: ret
|
||||
;
|
||||
; GISEL-LABEL: f5:
|
||||
; GISEL: // %bb.0:
|
||||
; GISEL-NEXT: adrp x8, x2+2097144
|
||||
; GISEL-NEXT: ldr x0, [x8, :lo12:x2+2097144]
|
||||
; GISEL-NEXT: ret
|
||||
%l = load i64, i64* getelementptr ([16777216 x i64], [16777216 x i64]* @x2, i64 0, i64 262143)
|
||||
ret i64 %l
|
||||
}
|
||||
|
||||
define i64 @f6() {
|
||||
; CHECK: f6:
|
||||
; CHECK: adrp x8, x2
|
||||
; CHECK: add x8, x8, :lo12:x2
|
||||
; CHECK: mov w9, #2097152
|
||||
; CHECK: ldr x0, [x8, x9]
|
||||
; CHECK: ret
|
||||
; CHECK-LABEL: f6:
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: adrp x8, x2
|
||||
; CHECK-NEXT: add x8, x8, :lo12:x2
|
||||
; CHECK-NEXT: mov w9, #2097152
|
||||
; CHECK-NEXT: ldr x0, [x8, x9]
|
||||
; CHECK-NEXT: ret
|
||||
;
|
||||
; GISEL-LABEL: f6:
|
||||
; GISEL: // %bb.0:
|
||||
; GISEL-NEXT: adrp x9, x2
|
||||
; GISEL-NEXT: mov w8, #2097152
|
||||
; GISEL-NEXT: add x9, x9, :lo12:x2
|
||||
; GISEL-NEXT: ldr x0, [x9, x8]
|
||||
; GISEL-NEXT: ret
|
||||
%l = load i64, i64* getelementptr ([16777216 x i64], [16777216 x i64]* @x2, i64 0, i64 262144)
|
||||
ret i64 %l
|
||||
}
|
||||
|
||||
define i32 @f7() {
|
||||
; FIXME: GlobalISel doesn't handle vectors well.
|
||||
;
|
||||
; CHECK-LABEL: f7:
|
||||
; CHECK: // %bb.0: // %entry
|
||||
; CHECK-NEXT: adrp x8, x3+108
|
||||
; CHECK-NEXT: ldr w0, [x8, :lo12:x3+108]
|
||||
; CHECK-NEXT: ret
|
||||
;
|
||||
; GISEL-LABEL: f7:
|
||||
; GISEL: // %bb.0: // %entry
|
||||
; GISEL-NEXT: adrp x8, x3+88
|
||||
; GISEL-NEXT: add x8, x8, :lo12:x3+88
|
||||
; GISEL-NEXT: mov v0.d[1], x8
|
||||
; GISEL-NEXT: mov w9, #64
|
||||
; GISEL-NEXT: mov d1, v0.d[1]
|
||||
; GISEL-NEXT: sub x8, x9, #64 // =64
|
||||
; GISEL-NEXT: fmov x11, d1
|
||||
; GISEL-NEXT: fmov x10, d0
|
||||
; GISEL-NEXT: lsl x12, x11, x8
|
||||
; GISEL-NEXT: cmp x9, #64 // =64
|
||||
; GISEL-NEXT: lsr x8, x11, x8
|
||||
; GISEL-NEXT: orr x11, x12, x10, lsr #0
|
||||
; GISEL-NEXT: csel x8, x11, x8, lo
|
||||
; GISEL-NEXT: cmp x9, #0 // =0
|
||||
; GISEL-NEXT: csel x8, x10, x8, eq
|
||||
; GISEL-NEXT: ldr w0, [x8, #20]
|
||||
; GISEL-NEXT: ret
|
||||
|
||||
entry:
|
||||
; CHECK: f7
|
||||
; CHECK: adrp x8, x3+108
|
||||
; CHECK: ldr w0, [x8, :lo12:x3+108]
|
||||
%l = load i32, i32* getelementptr (i32, i32* inttoptr (i64 trunc (i128 lshr (i128 bitcast (<2 x i64> <i64 undef, i64 ptrtoint (i8** getelementptr inbounds ({ [9 x i8*], [8 x i8*] }, { [9 x i8*], [8 x i8*] }* @x3, i64 0, inrange i32 1, i64 2) to i64)> to i128), i128 64) to i64) to i32*), i64 5)
|
||||
ret i32 %l
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user