From 1f417e7ba56acb76007f68e362750407a74acbad Mon Sep 17 00:00:00 2001 From: Fangrui Song Date: Thu, 26 Mar 2020 23:40:23 -0700 Subject: [PATCH] [PPCInstPrinter] Print conditional branches as `bt 2, $target` instead of `bt 2, .+$imm` Follow-up of D76591. Reviewed By: #powerpc, sfertile Differential Revision: https://reviews.llvm.org/D76907 --- lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp | 7 +++++++ lib/Target/PowerPC/PPCInstrInfo.td | 2 ++ test/CodeGen/PowerPC/aix-return55.ll | 2 +- test/CodeGen/PowerPC/alignlongjumptest.mir | 4 ++-- test/MC/PowerPC/ppc64-prefix-align.s | 8 ++++---- test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s | 4 +++- test/tools/llvm-objdump/XCOFF/disassemble-all.test | 2 +- 7 files changed, 20 insertions(+), 9 deletions(-) diff --git a/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp b/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp index 49c2790d7ca..d6e0bc285b3 100644 --- a/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp +++ b/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp @@ -60,6 +60,13 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCDisassembler() { createPPCLEDisassembler); } +static DecodeStatus decodeCondBrTarget(MCInst &Inst, unsigned Imm, + uint64_t /*Address*/, + const void * /*Decoder*/) { + Inst.addOperand(MCOperand::createImm(SignExtend32<14>(Imm))); + return MCDisassembler::Success; +} + static DecodeStatus DecodePCRel24BranchTarget(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) { diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index 6c48512d8fb..3102b908981 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -764,7 +764,9 @@ def PPCCondBrAsmOperand : AsmOperandClass { def condbrtarget : Operand { let PrintMethod = "printBranchOperand"; let EncoderMethod = "getCondBrEncoding"; + let DecoderMethod = "decodeCondBrTarget"; let ParserMatchClass = PPCCondBrAsmOperand; + let OperandType = "OPERAND_PCREL"; } def abscondbrtarget : Operand { let PrintMethod = "printAbsBranchOperand"; diff --git a/test/CodeGen/PowerPC/aix-return55.ll b/test/CodeGen/PowerPC/aix-return55.ll index 0aa49e68ff0..a18a211b46b 100644 --- a/test/CodeGen/PowerPC/aix-return55.ll +++ b/test/CodeGen/PowerPC/aix-return55.ll @@ -31,7 +31,7 @@ entry: ;CHECKOBJ-NEXT: 18: 00 01 23 45 ;CHECKOBJ-NEXT: 1c: 67 8a bc de oris 10, 28, 48350{{[[:space:]] *}} ;CHECKOBJ-NEXT: 00000020 : -;CHECKOBJ-NEXT: 20: 40 14 00 00 bdnzf 20, $+0 +;CHECKOBJ-NEXT: 20: 40 14 00 00 bdnzf 20, 0x20 ;CHECKOBJ-NEXT: 24: 00 00 00 00 {{[[:space:]] *}} ;CHECKOBJ-NEXT: 00000028 : ;CHECKOBJ-NEXT: 28: 00 00 00 00 diff --git a/test/CodeGen/PowerPC/alignlongjumptest.mir b/test/CodeGen/PowerPC/alignlongjumptest.mir index 2ec09b0fb26..56ddb2dc033 100644 --- a/test/CodeGen/PowerPC/alignlongjumptest.mir +++ b/test/CodeGen/PowerPC/alignlongjumptest.mir @@ -70,12 +70,12 @@ body: | ... # Check for the long branch. -# CHECK-LE: 08 00 82 4{{[01]}} b{{[tf]}} 2, .+8 +# CHECK-LE: 08 00 82 4{{[01]}} b{{[tf]}} 2, 0xc # CHECK-LE-NEXT: fc 7f 00 48 b .+32764 # CHECK-LE-DAG: paddi 3, 3, 13, 0 # CHECK-LE-DAG: paddi 3, 3, 21, 0 # CHECK-LE: blr -# CHECK-BE: 4{{[01]}} 82 00 08 b{{[tf]}} 2, .+8 +# CHECK-BE: 4{{[01]}} 82 00 08 b{{[tf]}} 2, 0xc # CHECK-BE-NEXT: 48 00 7f fc b .+32764 # CHECK-BE-DAG: paddi 3, 3, 13, 0 # CHECK-BE-DAG: paddi 3, 3, 21, 0 diff --git a/test/MC/PowerPC/ppc64-prefix-align.s b/test/MC/PowerPC/ppc64-prefix-align.s index 80d2f0722a7..29594e9e33a 100644 --- a/test/MC/PowerPC/ppc64-prefix-align.s +++ b/test/MC/PowerPC/ppc64-prefix-align.s @@ -13,10 +13,10 @@ beq 0, LAB1 # 4 beq 1, LAB2 # 8 -# CHECK-BE: 0: 41 82 00 c0 bt 2, .+192 -# CHECK-BE-NEXT: 4: 41 86 00 f8 bt 6, .+248 -# CHECK-LE: 0: c0 00 82 41 bt 2, .+192 -# CHECK-LE-NEXT: 4: f8 00 86 41 bt 6, .+248 +# CHECK-BE: 0: 41 82 00 c0 bt 2, 0xc0 +# CHECK-BE-NEXT: 4: 41 86 00 f8 bt 6, 0xfc +# CHECK-LE: 0: c0 00 82 41 bt 2, 0xc0 +# CHECK-LE-NEXT: 4: f8 00 86 41 bt 6, 0xfc paddi 1, 2, 8589934576, 0 # 16 paddi 1, 2, 8589934576, 0 # 24 paddi 1, 2, 8589934576, 0 # 32 diff --git a/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s b/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s index 73e3a68c6d9..f04b7e5c077 100644 --- a/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s +++ b/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s @@ -29,7 +29,9 @@ b: b .+4 # CHECK-LABEL: : -# CHECK-NEXT: bt 2, .+65532 +# CHECK-NEXT: 18: bt 2, 0x14 +# CHECK-NEXT: 1c: bt 1, 0x20 bt: bt 2, .-4 + bgt .+4 diff --git a/test/tools/llvm-objdump/XCOFF/disassemble-all.test b/test/tools/llvm-objdump/XCOFF/disassemble-all.test index 556a8e1c62e..1dee2aa2d52 100644 --- a/test/tools/llvm-objdump/XCOFF/disassemble-all.test +++ b/test/tools/llvm-objdump/XCOFF/disassemble-all.test @@ -55,7 +55,7 @@ CHECK: 000000a4 : CHECK-NEXT: ... CHECK: Disassembly of section .tdata: CHECK: 00000000 : -CHECK-NEXT: 0: 40 09 21 f9 bdnzfl 9, $+8696 +CHECK-NEXT: 0: 40 09 21 f9 bdnzfl 9, 0x21f8 CHECK-NEXT: 4: f0 1b 86 6e CHECK: Disassembly of section .tbss: CHECK: 00000008 :