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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-26 04:32:44 +01:00

Nuke PowerPCInstrFormats.h, its contents are dead. Remove the definitions

from the .td file that correspond to it

llvm-svn: 23736
This commit is contained in:
Chris Lattner 2005-10-14 22:44:13 +00:00
parent 3b6c2df603
commit 1f9360318d
6 changed files with 11 additions and 87 deletions

View File

@ -15,7 +15,7 @@
#include "PowerPC.h"
#include "PowerPCInstrBuilder.h"
#include "PowerPCInstrInfo.h"
#include "PPC32InstrInfo.h"
#include "PPC32TargetMachine.h"
#include "PPC32ISelLowering.h"
#include "llvm/Constants.h"

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@ -14,7 +14,8 @@
#ifndef POWERPC32_INSTRUCTIONINFO_H
#define POWERPC32_INSTRUCTIONINFO_H
#include "PowerPCInstrInfo.h"
#include "PowerPC.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "PPC32RegisterInfo.h"
namespace llvm {

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@ -342,6 +342,13 @@ void PowerPCAsmPrinter::printOp(const MachineOperand &MO, bool IsCallOp) {
///
void PowerPCAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
++EmittedInsts;
/// NOTE: THIS SHOULD NEVER BE CHECKED IN. STAY LOCAL IN CHRIS'S TREE.
if (0 && MI->getOpcode() == PPC::OR)
assert((MI->getOperand(0).getReg() != MI->getOperand(1).getReg() ||
MI->getOperand(2).getReg() != MI->getOperand(1).getReg()) &&
"noop copy emitted!");
// Check for slwi/srwi mnemonics.
if (MI->getOpcode() == PPC::RLWINM) {
bool FoundMnemonic = false;

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@ -18,7 +18,6 @@
#define DEBUG_TYPE "bsel"
#include "PowerPC.h"
#include "PowerPCInstrBuilder.h"
#include "PowerPCInstrInfo.h"
#include "PPC32InstrInfo.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/Support/Debug.h"

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@ -10,34 +10,6 @@
//
//===----------------------------------------------------------------------===//
class Format<bits<5> val> {
bits<5> Value = val;
}
def Pseudo: Format<0>;
def Gpr : Format<1>;
def Gpr0 : Format<2>;
def Simm16 : Format<3>;
def PCRelimm24 : Format<5>;
def Imm24 : Format<6>;
def Imm5 : Format<7>;
def PCRelimm14 : Format<8>;
def Imm14 : Format<9>;
def Imm2 : Format<10>;
def Crf : Format<11>;
def Imm3 : Format<12>;
def Imm1 : Format<13>;
def Fpr : Format<14>;
def Imm4 : Format<15>;
def Imm8 : Format<16>;
def Disimm16 : Format<17>;
def Disimm14 : Format<18>;
def Spr : Format<19>;
def Sgr : Format<20>;
def Imm15 : Format<21>;
def Vpr : Format<22>;
def Imm6 : Format<23>;
//===----------------------------------------------------------------------===//
//
// PowerPC instruction formats

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@ -1,55 +0,0 @@
//===- PowerPCInstrInfo.h - PowerPC Instruction Information -----*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file contains the PowerPC implementation of the TargetInstrInfo class.
//
//===----------------------------------------------------------------------===//
#ifndef POWERPC_INSTRUCTIONINFO_H
#define POWERPC_INSTRUCTIONINFO_H
#include "PowerPC.h"
#include "llvm/Target/TargetInstrInfo.h"
namespace llvm {
namespace PPCII {
enum {
VMX = 1 << 0,
PPC64 = 1 << 1,
};
enum {
None = 0,
Gpr = 1,
Gpr0 = 2,
Simm16 = 3,
Zimm16 = 4,
PCRelimm24 = 5,
Imm24 = 6,
Imm5 = 7,
PCRelimm14 = 8,
Imm14 = 9,
Imm2 = 10,
Crf = 11,
Imm3 = 12,
Imm1 = 13,
Fpr = 14,
Imm4 = 15,
Imm8 = 16,
Disimm16 = 17,
Disimm14 = 18,
Spr = 19,
Sgr = 20,
Imm15 = 21,
Vpr = 22
};
}
}
#endif