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fastcc -> fastcall
llvm-svn: 34749
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@ -1,16 +1,14 @@
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel -enable-x86-fastcc | grep 'mov EDX, 1'
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; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | grep 'mov EDX, 1'
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; check that fastcc is passing stuff in regs.
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; Argument reg passing is disabled due to regalloc issues. FIXME!
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; XFAIL: *
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declare x86_fastcallcc i64 @callee(i64)
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declare fastcc long %callee(long)
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long %caller() {
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%X = call fastcc long %callee(long 4294967299) ;; (1ULL << 32) + 3
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ret long %X
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define i64 @caller() {
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%X = callx86_fastcallcc i64 @callee( i64 4294967299 ) ; <i64> [#uses=1]
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ret i64 %X
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}
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fastcc long %caller2(long %X) {
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ret long %X
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define x86_fastcallcc i64 @caller2(i64 %X) {
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ret i64 %X
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}
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