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Consolidate existing utilities for interpreting vector predicate maskes [NFC]
llvm-svn: 359163
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@ -223,6 +223,20 @@ Constant *createSequentialMask(IRBuilder<> &Builder, unsigned Start,
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/// elements, it will be padded with undefs.
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/// elements, it will be padded with undefs.
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Value *concatenateVectors(IRBuilder<> &Builder, ArrayRef<Value *> Vecs);
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Value *concatenateVectors(IRBuilder<> &Builder, ArrayRef<Value *> Vecs);
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/// Given a mask vector of the form <Y x i1>, Return true if all of the
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/// elements of this predicate mask are false or undef. That is, return true
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/// if all lanes can be assumed inactive.
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bool maskIsAllZeroOrUndef(Value *Mask);
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/// Given a mask vector of the form <Y x i1>, Return true if all of the
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/// elements of this predicate mask are true or undef. That is, return true
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/// if all lanes can be assumed active.
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bool maskIsAllOneOrUndef(Value *Mask);
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/// Given a mask vector of the form <Y x i1>, return an APInt (of bitwidth Y)
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/// for each lane which may be active.
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APInt possiblyDemandedEltsInMask(Value *Mask);
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/// The group of interleaved loads/stores sharing the same stride and
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/// The group of interleaved loads/stores sharing the same stride and
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/// close to each other.
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/// close to each other.
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///
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///
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@ -4635,22 +4635,6 @@ static Value *SimplifyRelativeLoad(Constant *Ptr, Constant *Offset,
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return ConstantExpr::getBitCast(LoadedLHSPtr, Int8PtrTy);
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return ConstantExpr::getBitCast(LoadedLHSPtr, Int8PtrTy);
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}
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}
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static bool maskIsAllZeroOrUndef(Value *Mask) {
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auto *ConstMask = dyn_cast<Constant>(Mask);
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if (!ConstMask)
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return false;
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if (ConstMask->isNullValue() || isa<UndefValue>(ConstMask))
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return true;
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for (unsigned I = 0, E = ConstMask->getType()->getVectorNumElements(); I != E;
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++I) {
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if (auto *MaskElt = ConstMask->getAggregateElement(I))
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if (MaskElt->isNullValue() || isa<UndefValue>(MaskElt))
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continue;
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return false;
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}
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return true;
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}
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static Value *simplifyUnaryIntrinsic(Function *F, Value *Op0,
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static Value *simplifyUnaryIntrinsic(Function *F, Value *Op0,
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const SimplifyQuery &Q) {
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const SimplifyQuery &Q) {
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// Idempotent functions return the same result when called repeatedly.
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// Idempotent functions return the same result when called repeatedly.
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@ -715,6 +715,52 @@ Value *llvm::concatenateVectors(IRBuilder<> &Builder, ArrayRef<Value *> Vecs) {
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return ResList[0];
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return ResList[0];
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}
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}
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bool llvm::maskIsAllZeroOrUndef(Value *Mask) {
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auto *ConstMask = dyn_cast<Constant>(Mask);
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if (!ConstMask)
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return false;
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if (ConstMask->isNullValue() || isa<UndefValue>(ConstMask))
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return true;
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for (unsigned I = 0, E = ConstMask->getType()->getVectorNumElements(); I != E;
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++I) {
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if (auto *MaskElt = ConstMask->getAggregateElement(I))
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if (MaskElt->isNullValue() || isa<UndefValue>(MaskElt))
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continue;
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return false;
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}
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return true;
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}
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bool llvm::maskIsAllOneOrUndef(Value *Mask) {
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auto *ConstMask = dyn_cast<Constant>(Mask);
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if (!ConstMask)
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return false;
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if (ConstMask->isAllOnesValue() || isa<UndefValue>(ConstMask))
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return true;
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for (unsigned I = 0, E = ConstMask->getType()->getVectorNumElements(); I != E;
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++I) {
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if (auto *MaskElt = ConstMask->getAggregateElement(I))
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if (MaskElt->isAllOnesValue() || isa<UndefValue>(MaskElt))
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continue;
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return false;
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}
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return true;
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}
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/// TODO: This is a lot like known bits, but for
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/// vectors. Is there something we can common this with?
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APInt llvm::possiblyDemandedEltsInMask(Value *Mask) {
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const unsigned VWidth = cast<VectorType>(Mask->getType())->getNumElements();
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APInt DemandedElts = APInt::getAllOnesValue(VWidth);
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if (auto *CV = dyn_cast<ConstantVector>(Mask))
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for (unsigned i = 0; i < VWidth; i++)
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if (CV->getAggregateElement(i)->isNullValue())
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DemandedElts.clearBit(i);
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return DemandedElts;
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}
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bool InterleavedAccessInfo::isStrided(int Stride) {
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bool InterleavedAccessInfo::isStrided(int Stride) {
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unsigned Factor = std::abs(Stride);
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unsigned Factor = std::abs(Stride);
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return Factor >= 2 && Factor <= MaxInterleaveGroupFactor;
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return Factor >= 2 && Factor <= MaxInterleaveGroupFactor;
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@ -24,7 +24,6 @@
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#include "llvm/Analysis/Loads.h"
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#include "llvm/Analysis/Loads.h"
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#include "llvm/Analysis/InstructionSimplify.h"
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#include "llvm/Analysis/InstructionSimplify.h"
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#include "llvm/Analysis/MemoryBuiltins.h"
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#include "llvm/Analysis/MemoryBuiltins.h"
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#include "llvm/Transforms/Utils/Local.h"
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#include "llvm/Analysis/ValueTracking.h"
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#include "llvm/Analysis/ValueTracking.h"
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#include "llvm/Analysis/VectorUtils.h"
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#include "llvm/Analysis/VectorUtils.h"
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#include "llvm/IR/Attributes.h"
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#include "llvm/IR/Attributes.h"
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@ -58,6 +57,7 @@
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Transforms/InstCombine/InstCombineWorklist.h"
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#include "llvm/Transforms/InstCombine/InstCombineWorklist.h"
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#include "llvm/Transforms/Utils/Local.h"
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#include "llvm/Transforms/Utils/SimplifyLibCalls.h"
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#include "llvm/Transforms/Utils/SimplifyLibCalls.h"
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#include <algorithm>
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#include <algorithm>
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#include <cassert>
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#include <cassert>
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@ -1147,36 +1147,6 @@ static Value *simplifyX86vpermv(const IntrinsicInst &II,
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return Builder.CreateShuffleVector(V1, V2, ShuffleMask);
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return Builder.CreateShuffleVector(V1, V2, ShuffleMask);
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}
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}
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static bool maskIsAllOneOrUndef(Value *Mask) {
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auto *ConstMask = dyn_cast<Constant>(Mask);
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if (!ConstMask)
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return false;
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if (ConstMask->isAllOnesValue() || isa<UndefValue>(ConstMask))
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return true;
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for (unsigned I = 0, E = ConstMask->getType()->getVectorNumElements(); I != E;
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++I) {
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if (auto *MaskElt = ConstMask->getAggregateElement(I))
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if (MaskElt->isAllOnesValue() || isa<UndefValue>(MaskElt))
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continue;
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return false;
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}
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return true;
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}
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/// Given a mask vector <Y x i1>, return an APInt (of bitwidth Y) for each lane
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/// which may be active. TODO: This is a lot like known bits, but for
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/// vectors. Is there something we can common this with?
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static APInt possiblyDemandedEltsInMask(Value *Mask) {
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const unsigned VWidth = cast<VectorType>(Mask->getType())->getNumElements();
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APInt DemandedElts = APInt::getAllOnesValue(VWidth);
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if (auto *CV = dyn_cast<ConstantVector>(Mask))
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for (unsigned i = 0; i < VWidth; i++)
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if (CV->getAggregateElement(i)->isNullValue())
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DemandedElts.clearBit(i);
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return DemandedElts;
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}
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// TODO, Obvious Missing Transforms:
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// TODO, Obvious Missing Transforms:
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// * Narrow width by halfs excluding zero/undef lanes
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// * Narrow width by halfs excluding zero/undef lanes
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Value *InstCombiner::simplifyMaskedLoad(IntrinsicInst &II) {
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Value *InstCombiner::simplifyMaskedLoad(IntrinsicInst &II) {
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