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[PPC] Always use the version of computeKnownBits that returns a value. NFCI.

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Continues the work started by @bogner in rL340594 to remove uses of the KnownBits output paramater version.

llvm-svn: 349903
This commit is contained in:
Simon Pilgrim 2018-12-21 14:32:39 +00:00
parent f95b3a4cfa
commit 207c31768e
2 changed files with 9 additions and 15 deletions
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11
lib/Target/PowerPC/PPCISelDAGToDAG.cpp
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@ -688,9 +688,8 @@ bool PPCDAGToDAGISel::tryBitfieldInsert(SDNode *N) {
SDValue Op1 = N->getOperand(1); SDValue Op1 = N->getOperand(1);
SDLoc dl(N); SDLoc dl(N);
KnownBits LKnown, RKnown; KnownBits LKnown = CurDAG->computeKnownBits(Op0);
CurDAG->computeKnownBits(Op0, LKnown); KnownBits RKnown = CurDAG->computeKnownBits(Op1);
CurDAG->computeKnownBits(Op1, RKnown);
unsigned TargetMask = LKnown.Zero.getZExtValue(); unsigned TargetMask = LKnown.Zero.getZExtValue();
unsigned InsertMask = RKnown.Zero.getZExtValue(); unsigned InsertMask = RKnown.Zero.getZExtValue();
@ -734,8 +733,7 @@ bool PPCDAGToDAGISel::tryBitfieldInsert(SDNode *N) {
// The AND mask might not be a constant, and we need to make sure that // The AND mask might not be a constant, and we need to make sure that
// if we're going to fold the masking with the insert, all bits not // if we're going to fold the masking with the insert, all bits not
// know to be zero in the mask are known to be one. // know to be zero in the mask are known to be one.
KnownBits MKnown; KnownBits MKnown = CurDAG->computeKnownBits(Op1.getOperand(1));
CurDAG->computeKnownBits(Op1.getOperand(1), MKnown);
bool CanFoldMask = InsertMask == MKnown.One.getZExtValue(); bool CanFoldMask = InsertMask == MKnown.One.getZExtValue();
unsigned SHOpc = Op1.getOperand(0).getOpcode(); unsigned SHOpc = Op1.getOperand(0).getOpcode();
@ -4613,8 +4611,7 @@ void PPCDAGToDAGISel::Select(SDNode *N) {
int16_t Imm; int16_t Imm;
if (N->getOperand(0)->getOpcode() == ISD::FrameIndex && if (N->getOperand(0)->getOpcode() == ISD::FrameIndex &&
isIntS16Immediate(N->getOperand(1), Imm)) { isIntS16Immediate(N->getOperand(1), Imm)) {
KnownBits LHSKnown; KnownBits LHSKnown = CurDAG->computeKnownBits(N->getOperand(0));
CurDAG->computeKnownBits(N->getOperand(0), LHSKnown);
// If this is equivalent to an add, then we can fold it with the // If this is equivalent to an add, then we can fold it with the
// FrameIndex calculation. // FrameIndex calculation.

13
lib/Target/PowerPC/PPCISelLowering.cpp
View File

@ -2216,11 +2216,10 @@ bool PPCTargetLowering::SelectAddressRegReg(SDValue N, SDValue &Base,
// If this is an or of disjoint bitfields, we can codegen this as an add // If this is an or of disjoint bitfields, we can codegen this as an add
// (for better address arithmetic) if the LHS and RHS of the OR are provably // (for better address arithmetic) if the LHS and RHS of the OR are provably
// disjoint. // disjoint.
KnownBits LHSKnown, RHSKnown; KnownBits LHSKnown = DAG.computeKnownBits(N.getOperand(0));
DAG.computeKnownBits(N.getOperand(0), LHSKnown);
if (LHSKnown.Zero.getBoolValue()) { if (LHSKnown.Zero.getBoolValue()) {
DAG.computeKnownBits(N.getOperand(1), RHSKnown); KnownBits RHSKnown = DAG.computeKnownBits(N.getOperand(1));
// If all of the bits are known zero on the LHS or RHS, the add won't // If all of the bits are known zero on the LHS or RHS, the add won't
// carry. // carry.
if (~(LHSKnown.Zero | RHSKnown.Zero) == 0) { if (~(LHSKnown.Zero | RHSKnown.Zero) == 0) {
@ -2319,8 +2318,7 @@ bool PPCTargetLowering::SelectAddressRegImm(SDValue N, SDValue &Disp,
// If this is an or of disjoint bitfields, we can codegen this as an add // If this is an or of disjoint bitfields, we can codegen this as an add
// (for better address arithmetic) if the LHS and RHS of the OR are // (for better address arithmetic) if the LHS and RHS of the OR are
// provably disjoint. // provably disjoint.
KnownBits LHSKnown; KnownBits LHSKnown = DAG.computeKnownBits(N.getOperand(0));
DAG.computeKnownBits(N.getOperand(0), LHSKnown);
if ((LHSKnown.Zero.getZExtValue()|~(uint64_t)imm) == ~0ULL) { if ((LHSKnown.Zero.getZExtValue()|~(uint64_t)imm) == ~0ULL) {
// If all of the bits are known zero on the LHS or RHS, the add won't // If all of the bits are known zero on the LHS or RHS, the add won't
@ -11316,9 +11314,8 @@ SDValue PPCTargetLowering::DAGCombineTruncBoolExt(SDNode *N,
} else { } else {
// This is neither a signed nor an unsigned comparison, just make sure // This is neither a signed nor an unsigned comparison, just make sure
// that the high bits are equal. // that the high bits are equal.
KnownBits Op1Known, Op2Known; KnownBits Op1Known = DAG.computeKnownBits(N->getOperand(0));
DAG.computeKnownBits(N->getOperand(0), Op1Known); KnownBits Op2Known = DAG.computeKnownBits(N->getOperand(1));
DAG.computeKnownBits(N->getOperand(1), Op2Known);
// We don't really care about what is known about the first bit (if // We don't really care about what is known about the first bit (if
// anything), so clear it in all masks prior to comparing them. // anything), so clear it in all masks prior to comparing them.