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Use the default lowering of ISD::DYNAMIC_STACKALLOC, delete now dead code.

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llvm-svn: 25333
This commit is contained in:
Chris Lattner 2006-01-15 09:00:21 +00:00
parent ada619f3b6
commit 20f25dc8c2
3 changed files with 4 additions and 84 deletions
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40
lib/Target/X86/X86ISelDAGToDAG.cpp
View File

@ -700,46 +700,6 @@ SDOperand X86DAGToDAGISel::Select(SDOperand N) {
Base, Scale, Index, Disp, Chain);
return Chain;
}
case ISD::DYNAMIC_STACKALLOC: {
SDOperand Chain = N.getOperand(0);
SDOperand Size = N.getOperand(1);
SDOperand Align = N.getOperand(2);
// FIXME: We are currently ignoring the requested alignment for handling
// greater than the stack alignment. This will need to be revisited at
// some point.
if (!isa<ConstantSDNode>(Align) ||
cast<ConstantSDNode>(Align)->getValue() != 0) {
std::cerr << "Cannot allocate stack object with greater alignment than"
<< " the stack alignment yet!";
abort();
}
// FIXME: This produces crappy code. Lots of unnecessary MOV32rr to and
// from ESP.
SDOperand InFlag;
SDOperand SPVal = CurDAG->getCopyFromReg(Chain, X86::ESP, MVT::i32, InFlag);
Chain = SPVal.getValue(1);
InFlag = SPVal.getValue(2);
SDOperand Result = Select(CurDAG->getNode(X86ISD::SUB_FLAG, MVT::i32,
SPVal, Size, InFlag));
InFlag = Result.getValue(1);
// Force the result back into ESP.
Chain = CurDAG->getCopyToReg(Chain,
CurDAG->getRegister(X86::ESP, MVT::i32),
Result, InFlag);
InFlag = Chain.getValue(1);
// Copy the result back from ESP.
Result = CurDAG->getCopyFromReg(Chain, X86::ESP, MVT::i32, InFlag);
CodeGenMap[N.getValue(0)] = Result;
CodeGenMap[N.getValue(1)] = Result.getValue(1);
return Result.getValue(N.ResNo);
}
}
return SelectCode(N);

7
lib/Target/X86/X86ISelLowering.cpp
View File

@ -162,9 +162,10 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM)
setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand);
// Not implemented yet.
setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
// Expand to the default code.
setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32 , Expand);
if (X86ScalarSSE) {
// Set up the FP register classes.

41
lib/Target/X86/X86ISelPattern.cpp
View File

@ -2386,46 +2386,6 @@ unsigned ISel::SelectExpr(SDOperand N) {
return Result;
}
case ISD::DYNAMIC_STACKALLOC:
// Generate both result values.
if (Result != 1)
ExprMap[N.getValue(1)] = 1; // Generate the token
else
Result = ExprMap[N.getValue(0)] = MakeReg(N.getValue(0).getValueType());
// FIXME: We are currently ignoring the requested alignment for handling
// greater than the stack alignment. This will need to be revisited at some
// point. Align = N.getOperand(2);
if (!isa<ConstantSDNode>(N.getOperand(2)) ||
cast<ConstantSDNode>(N.getOperand(2))->getValue() != 0) {
std::cerr << "Cannot allocate stack object with greater alignment than"
<< " the stack alignment yet!";
abort();
}
if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
Select(N.getOperand(0));
BuildMI(BB, X86::SUB32ri, 2, X86::ESP).addReg(X86::ESP)
.addImm(CN->getValue());
} else {
if (getRegPressure(N.getOperand(0)) > getRegPressure(N.getOperand(1))) {
Select(N.getOperand(0));
Tmp1 = SelectExpr(N.getOperand(1));
} else {
Tmp1 = SelectExpr(N.getOperand(1));
Select(N.getOperand(0));
}
// Subtract size from stack pointer, thereby allocating some space.
BuildMI(BB, X86::SUB32rr, 2, X86::ESP).addReg(X86::ESP).addReg(Tmp1);
}
// Put a pointer to the space into the result register, by copying the stack
// pointer.
BuildMI(BB, X86::MOV32rr, 1, Result).addReg(X86::ESP);
return Result;
case X86ISD::TAILCALL:
case X86ISD::CALL: {
// The chain for this call is now lowered.
@ -3295,7 +3255,6 @@ void ISel::Select(SDOperand N) {
case ISD::EXTLOAD:
case ISD::SEXTLOAD:
case ISD::ZEXTLOAD:
case ISD::DYNAMIC_STACKALLOC:
case X86ISD::TAILCALL:
case X86ISD::CALL:
ExprMap.erase(N);