RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 19:52:54 +01:00
Code Issues Projects Releases Wiki Activity

DebugLoc form of getNOT().

Browse Source 
llvm-svn: 63433
This commit is contained in:
Bill Wendling 2009-01-30 22:11:22 +00:00
parent de0da1da41
commit 211088dc71
2 changed files with 18 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
include/llvm/CodeGen/SelectionDAG.h
View File

@ -379,6 +379,7 @@ public:
/// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
SDValue getNOT(SDValue Val, MVT VT);
SDValue getNOT(DebugLoc DL, SDValue Val, MVT VT);
/// getCALLSEQ_START - Return a new CALLSEQ_START node, which always must have
/// a flag result (to ensure it's not CSE'd).

17
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
View File

@ -846,6 +846,23 @@ SDValue SelectionDAG::getNOT(SDValue Val, MVT VT) {
return getNode(ISD::XOR, VT, Val, NegOne);
}
/// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
///
SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, MVT VT) {
SDValue NegOne;
if (VT.isVector()) {
MVT EltVT = VT.getVectorElementType();
SDValue NegOneElt = getConstant(EltVT.getIntegerVTBitMask(), EltVT);
std::vector<SDValue> NegOnes(VT.getVectorNumElements(), NegOneElt);
NegOne = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), VT,
&NegOnes[0], NegOnes.size());
} else {
NegOne = getConstant(VT.getIntegerVTBitMask(), VT);
}
return getNode(ISD::XOR, DL, VT, Val, NegOne);
}
SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
assert((EltVT.getSizeInBits() >= 64 ||