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Remove the LoadCombine pass. It was never enabled and is unsupported.
Based on discussions with the author on mailing lists. llvm-svn: 306067
This commit is contained in:
Eric Christopher
parent
ebd75a0e7c
commit
2152bd6a82
@ -192,7 +192,6 @@ void initializeLiveRangeShrinkPass(PassRegistry&);
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void initializeLiveRegMatrixPass(PassRegistry&);
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void initializeLiveStacksPass(PassRegistry&);
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void initializeLiveVariablesPass(PassRegistry&);
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void initializeLoadCombinePass(PassRegistry&);
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void initializeLoadStoreVectorizerPass(PassRegistry&);
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void initializeLoaderPassPass(PassRegistry&);
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void initializeLocalStackSlotPassPass(PassRegistry&);
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@ -149,7 +149,6 @@ public:
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bool SLPVectorize;
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bool LoopVectorize;
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bool RerollLoops;
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bool LoadCombine;
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bool NewGVN;
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bool DisableGVNLoadPRE;
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bool VerifyInput;
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@ -485,12 +485,6 @@ FunctionPass *createSpeculativeExecutionPass();
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// TargetTransformInfo::hasBranchDivergence() is true.
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FunctionPass *createSpeculativeExecutionIfHasBranchDivergencePass();
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//===----------------------------------------------------------------------===//
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//
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// LoadCombine - Combine loads into bigger loads.
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//
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BasicBlockPass *createLoadCombinePass();
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//===----------------------------------------------------------------------===//
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//
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// StraightLineStrengthReduce - This pass strength-reduces some certain
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@ -923,9 +923,6 @@ ModulePassManager PassBuilder::buildLTODefaultPipeline(OptimizationLevel Level,
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MainFPM.add(AlignmentFromAssumptionsPass());
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#endif
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// FIXME: Conditionally run LoadCombine here, after it's ported
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// (in case we still have this pass, given its questionable usefulness).
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// FIXME: add peephole extensions to the PM here.
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MainFPM.addPass(InstCombinePass());
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MainFPM.addPass(JumpThreadingPass());
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@ -72,10 +72,6 @@ static cl::opt<bool>
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RunLoopRerolling("reroll-loops", cl::Hidden,
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cl::desc("Run the loop rerolling pass"));
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static cl::opt<bool> RunLoadCombine("combine-loads", cl::init(false),
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cl::Hidden,
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cl::desc("Run the load combining pass"));
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static cl::opt<bool> RunNewGVN("enable-newgvn", cl::init(false), cl::Hidden,
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cl::desc("Run the NewGVN pass"));
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@ -174,7 +170,6 @@ PassManagerBuilder::PassManagerBuilder() {
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SLPVectorize = RunSLPVectorization;
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LoopVectorize = RunLoopVectorization;
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RerollLoops = RunLoopRerolling;
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LoadCombine = RunLoadCombine;
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NewGVN = RunNewGVN;
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DisableGVNLoadPRE = false;
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VerifyInput = false;
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@ -407,9 +402,6 @@ void PassManagerBuilder::addFunctionSimplificationPasses(
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}
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}
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if (LoadCombine)
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MPM.add(createLoadCombinePass());
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MPM.add(createAggressiveDCEPass()); // Delete dead instructions
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MPM.add(createCFGSimplificationPass()); // Merge & remove BBs
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// Clean up after everything.
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@ -850,9 +842,6 @@ void PassManagerBuilder::addLTOOptimizationPasses(legacy::PassManagerBase &PM) {
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// alignments.
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PM.add(createAlignmentFromAssumptionsPass());
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if (LoadCombine)
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PM.add(createLoadCombinePass());
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// Cleanup and simplify the code after the scalar optimizations.
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addInstructionCombiningPass(PM);
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addExtensionsToPM(EP_Peephole, PM);
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@ -22,7 +22,6 @@ add_llvm_library(LLVMScalarOpts
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LICM.cpp
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LoopAccessAnalysisPrinter.cpp
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LoopSink.cpp
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LoadCombine.cpp
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LoopDeletion.cpp
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LoopDataPrefetch.cpp
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LoopDistribute.cpp
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@ -1,295 +0,0 @@
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//===- LoadCombine.cpp - Combine Adjacent Loads ---------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This transformation combines adjacent loads.
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///
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//===----------------------------------------------------------------------===//
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/Analysis/AliasAnalysis.h"
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#include "llvm/Analysis/AliasSetTracker.h"
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#include "llvm/Analysis/GlobalsModRef.h"
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#include "llvm/Analysis/TargetFolder.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/IR/Dominators.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/IRBuilder.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/Module.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Transforms/Scalar.h"
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using namespace llvm;
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#define DEBUG_TYPE "load-combine"
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STATISTIC(NumLoadsAnalyzed, "Number of loads analyzed for combining");
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STATISTIC(NumLoadsCombined, "Number of loads combined");
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#define LDCOMBINE_NAME "Combine Adjacent Loads"
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namespace {
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struct PointerOffsetPair {
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Value *Pointer;
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APInt Offset;
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};
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struct LoadPOPPair {
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LoadInst *Load;
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PointerOffsetPair POP;
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/// \brief The new load needs to be created before the first load in IR order.
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unsigned InsertOrder;
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};
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class LoadCombine : public BasicBlockPass {
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LLVMContext *C;
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AliasAnalysis *AA;
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DominatorTree *DT;
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public:
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LoadCombine() : BasicBlockPass(ID), C(nullptr), AA(nullptr) {
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initializeLoadCombinePass(*PassRegistry::getPassRegistry());
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}
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using llvm::Pass::doInitialization;
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bool doInitialization(Function &) override;
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bool runOnBasicBlock(BasicBlock &BB) override;
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.setPreservesCFG();
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AU.addRequired<AAResultsWrapperPass>();
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AU.addRequired<DominatorTreeWrapperPass>();
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AU.addPreserved<GlobalsAAWrapperPass>();
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}
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StringRef getPassName() const override { return LDCOMBINE_NAME; }
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static char ID;
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typedef IRBuilder<TargetFolder> BuilderTy;
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private:
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BuilderTy *Builder;
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PointerOffsetPair getPointerOffsetPair(LoadInst &);
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bool combineLoads(DenseMap<const Value *, SmallVector<LoadPOPPair, 8>> &);
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bool aggregateLoads(SmallVectorImpl<LoadPOPPair> &);
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bool combineLoads(SmallVectorImpl<LoadPOPPair> &);
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};
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}
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bool LoadCombine::doInitialization(Function &F) {
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DEBUG(dbgs() << "LoadCombine function: " << F.getName() << "\n");
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C = &F.getContext();
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return true;
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}
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PointerOffsetPair LoadCombine::getPointerOffsetPair(LoadInst &LI) {
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auto &DL = LI.getModule()->getDataLayout();
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PointerOffsetPair POP;
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POP.Pointer = LI.getPointerOperand();
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unsigned BitWidth = DL.getPointerSizeInBits(LI.getPointerAddressSpace());
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POP.Offset = APInt(BitWidth, 0);
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while (isa<BitCastInst>(POP.Pointer) || isa<GetElementPtrInst>(POP.Pointer)) {
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if (auto *GEP = dyn_cast<GetElementPtrInst>(POP.Pointer)) {
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APInt LastOffset = POP.Offset;
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if (!GEP->accumulateConstantOffset(DL, POP.Offset)) {
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// Can't handle GEPs with variable indices.
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POP.Offset = LastOffset;
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return POP;
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}
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POP.Pointer = GEP->getPointerOperand();
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} else if (auto *BC = dyn_cast<BitCastInst>(POP.Pointer)) {
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POP.Pointer = BC->getOperand(0);
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}
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}
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return POP;
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}
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bool LoadCombine::combineLoads(
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DenseMap<const Value *, SmallVector<LoadPOPPair, 8>> &LoadMap) {
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bool Combined = false;
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for (auto &Loads : LoadMap) {
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if (Loads.second.size() < 2)
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continue;
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std::sort(Loads.second.begin(), Loads.second.end(),
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[](const LoadPOPPair &A, const LoadPOPPair &B) {
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return A.POP.Offset.slt(B.POP.Offset);
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});
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if (aggregateLoads(Loads.second))
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Combined = true;
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}
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return Combined;
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}
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/// \brief Try to aggregate loads from a sorted list of loads to be combined.
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///
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/// It is guaranteed that no writes occur between any of the loads. All loads
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/// have the same base pointer. There are at least two loads.
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bool LoadCombine::aggregateLoads(SmallVectorImpl<LoadPOPPair> &Loads) {
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assert(Loads.size() >= 2 && "Insufficient loads!");
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LoadInst *BaseLoad = nullptr;
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SmallVector<LoadPOPPair, 8> AggregateLoads;
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bool Combined = false;
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bool ValidPrevOffset = false;
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APInt PrevOffset;
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uint64_t PrevSize = 0;
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for (auto &L : Loads) {
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if (ValidPrevOffset == false) {
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BaseLoad = L.Load;
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PrevOffset = L.POP.Offset;
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PrevSize = L.Load->getModule()->getDataLayout().getTypeStoreSize(
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L.Load->getType());
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AggregateLoads.push_back(L);
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ValidPrevOffset = true;
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continue;
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}
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if (L.Load->getAlignment() > BaseLoad->getAlignment())
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continue;
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APInt PrevEnd = PrevOffset + PrevSize;
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if (L.POP.Offset.sgt(PrevEnd)) {
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// No other load will be combinable
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if (combineLoads(AggregateLoads))
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Combined = true;
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AggregateLoads.clear();
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ValidPrevOffset = false;
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continue;
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}
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if (L.POP.Offset != PrevEnd)
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// This load is offset less than the size of the last load.
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// FIXME: We may want to handle this case.
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continue;
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PrevOffset = L.POP.Offset;
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PrevSize = L.Load->getModule()->getDataLayout().getTypeStoreSize(
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L.Load->getType());
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AggregateLoads.push_back(L);
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}
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if (combineLoads(AggregateLoads))
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Combined = true;
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return Combined;
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}
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/// \brief Given a list of combinable load. Combine the maximum number of them.
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bool LoadCombine::combineLoads(SmallVectorImpl<LoadPOPPair> &Loads) {
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// Remove loads from the end while the size is not a power of 2.
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unsigned TotalSize = 0;
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for (const auto &L : Loads)
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TotalSize += L.Load->getType()->getPrimitiveSizeInBits();
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while (TotalSize != 0 && !isPowerOf2_32(TotalSize))
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TotalSize -= Loads.pop_back_val().Load->getType()->getPrimitiveSizeInBits();
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if (Loads.size() < 2)
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return false;
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DEBUG({
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dbgs() << "***** Combining Loads ******\n";
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for (const auto &L : Loads) {
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dbgs() << L.POP.Offset << ": " << *L.Load << "\n";
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}
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});
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// Find first load. This is where we put the new load.
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LoadPOPPair FirstLP;
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FirstLP.InsertOrder = -1u;
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for (const auto &L : Loads)
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if (L.InsertOrder < FirstLP.InsertOrder)
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FirstLP = L;
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unsigned AddressSpace =
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FirstLP.POP.Pointer->getType()->getPointerAddressSpace();
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Builder->SetInsertPoint(FirstLP.Load);
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Value *Ptr = Builder->CreateConstGEP1_64(
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Builder->CreatePointerCast(Loads[0].POP.Pointer,
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Builder->getInt8PtrTy(AddressSpace)),
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Loads[0].POP.Offset.getSExtValue());
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LoadInst *NewLoad = new LoadInst(
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Builder->CreatePointerCast(
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Ptr, PointerType::get(IntegerType::get(Ptr->getContext(), TotalSize),
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Ptr->getType()->getPointerAddressSpace())),
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Twine(Loads[0].Load->getName()) + ".combined", false,
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Loads[0].Load->getAlignment(), FirstLP.Load);
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for (const auto &L : Loads) {
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Builder->SetInsertPoint(L.Load);
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Value *V = Builder->CreateExtractInteger(
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L.Load->getModule()->getDataLayout(), NewLoad,
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cast<IntegerType>(L.Load->getType()),
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(L.POP.Offset - Loads[0].POP.Offset).getZExtValue(), "combine.extract");
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L.Load->replaceAllUsesWith(V);
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}
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NumLoadsCombined += Loads.size();
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return true;
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}
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bool LoadCombine::runOnBasicBlock(BasicBlock &BB) {
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if (skipBasicBlock(BB))
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return false;
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AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
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DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();
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// Skip analysing dead blocks (not forward reachable from function entry).
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if (!DT->isReachableFromEntry(&BB)) {
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DEBUG(dbgs() << "LC: skipping unreachable " << BB.getName() <<
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" in " << BB.getParent()->getName() << "\n");
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return false;
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}
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IRBuilder<TargetFolder> TheBuilder(
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BB.getContext(), TargetFolder(BB.getModule()->getDataLayout()));
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Builder = &TheBuilder;
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DenseMap<const Value *, SmallVector<LoadPOPPair, 8>> LoadMap;
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AliasSetTracker AST(*AA);
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bool Combined = false;
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unsigned Index = 0;
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for (auto &I : BB) {
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if (I.mayThrow() || AST.containsUnknown(&I)) {
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if (combineLoads(LoadMap))
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Combined = true;
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LoadMap.clear();
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AST.clear();
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continue;
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}
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if (I.mayWriteToMemory()) {
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AST.add(&I);
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continue;
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}
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LoadInst *LI = dyn_cast<LoadInst>(&I);
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if (!LI)
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continue;
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++NumLoadsAnalyzed;
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if (!LI->isSimple() || !LI->getType()->isIntegerTy())
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continue;
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auto POP = getPointerOffsetPair(*LI);
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if (!POP.Pointer)
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continue;
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LoadMap[POP.Pointer].push_back({LI, std::move(POP), Index++});
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AST.add(LI);
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}
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if (combineLoads(LoadMap))
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Combined = true;
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return Combined;
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}
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char LoadCombine::ID = 0;
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BasicBlockPass *llvm::createLoadCombinePass() {
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return new LoadCombine();
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}
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INITIALIZE_PASS_BEGIN(LoadCombine, "load-combine", LDCOMBINE_NAME, false, false)
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INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
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INITIALIZE_PASS_END(LoadCombine, "load-combine", LDCOMBINE_NAME, false, false)
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@ -91,7 +91,6 @@ void llvm::initializeScalarOpts(PassRegistry &Registry) {
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initializeSeparateConstOffsetFromGEPPass(Registry);
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initializeSpeculativeExecutionLegacyPassPass(Registry);
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initializeStraightLineStrengthReducePass(Registry);
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initializeLoadCombinePass(Registry);
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initializePlaceBackedgeSafepointsImplPass(Registry);
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initializePlaceSafepointsPass(Registry);
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initializeFloat2IntLegacyPassPass(Registry);
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@ -1,39 +0,0 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -load-combine -S < %s | FileCheck %s
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; It has been detected that dead loops like the one in this test case can be
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; created by -jump-threading (it was detected by a csmith generated program).
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;
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; According to -verify this is valid input (even if it could be discussed if
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; the dead loop really satisfies SSA form).
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;
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; The problem found was that the -load-combine pass ends up in an infinite loop
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; when analysing the 'bb1' basic block.
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define void @test1() {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: ret void
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; CHECK: bb1:
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; CHECK-NEXT: [[_TMP4:%.*]] = load i16, i16* [[_TMP10:%.*]], align 1
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; CHECK-NEXT: [[_TMP10]] = getelementptr i16, i16* [[_TMP10]], i16 1
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; CHECK-NEXT: br label [[BB1:%.*]]
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; CHECK: bb2:
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; CHECK-NEXT: [[_TMP7:%.*]] = load i16, i16* [[_TMP12:%.*]], align 1
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; CHECK-NEXT: [[_TMP12]] = getelementptr i16, i16* [[_TMP12]], i16 1
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; CHECK-NEXT: br label [[BB2:%.*]]
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;
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ret void
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bb1:
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%_tmp4 = load i16, i16* %_tmp10, align 1
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%_tmp10 = getelementptr i16, i16* %_tmp10, i16 1
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br label %bb1
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; A second basic block. Running the test with -debug-pass=Executions shows
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; that we only run the Dominator Tree Construction one time for each function,
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; also when having multiple basic blocks in the function.
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bb2:
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%_tmp7 = load i16, i16* %_tmp12, align 1
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%_tmp12 = getelementptr i16, i16* %_tmp12, i16 1
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br label %bb2
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}
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@ -1,63 +0,0 @@
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; RUN: opt -basicaa -load-combine -S < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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define i64 @test1(i32* nocapture readonly noalias %a, i32* nocapture readonly noalias %b) {
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; CHECK-LABEL: @test1
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; CHECK: load i64, i64*
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; CHECK: ret i64
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%load1 = load i32, i32* %a, align 4
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%conv = zext i32 %load1 to i64
|
||||
%arrayidx1 = getelementptr inbounds i32, i32* %a, i64 1
|
||||
store i32 %load1, i32* %b, align 4
|
||||
%load2 = load i32, i32* %arrayidx1, align 4
|
||||
%conv2 = zext i32 %load2 to i64
|
||||
%shl = shl nuw i64 %conv2, 32
|
||||
%add = or i64 %shl, %conv
|
||||
ret i64 %add
|
||||
}
|
||||
|
||||
define i64 @test2(i32* nocapture readonly %a, i32* nocapture readonly %b) {
|
||||
; CHECK-LABEL: @test2
|
||||
|
||||
; CHECK-NOT: load i64
|
||||
; CHECK: load i32, i32*
|
||||
; CHECK: load i32, i32*
|
||||
; CHECK: ret i64
|
||||
|
||||
%load1 = load i32, i32* %a, align 4
|
||||
%conv = zext i32 %load1 to i64
|
||||
%arrayidx1 = getelementptr inbounds i32, i32* %a, i64 1
|
||||
store i32 %load1, i32* %b, align 4
|
||||
%load2 = load i32, i32* %arrayidx1, align 4
|
||||
%conv2 = zext i32 %load2 to i64
|
||||
%shl = shl nuw i64 %conv2, 32
|
||||
%add = or i64 %shl, %conv
|
||||
ret i64 %add
|
||||
}
|
||||
|
||||
%rec11 = type { i16, i16, i16 }
|
||||
@str = global %rec11 { i16 1, i16 2, i16 3 }
|
||||
|
||||
; PR31517 - Check that loads which span an aliasing store are not combined.
|
||||
define i16 @test3() {
|
||||
; CHECK-LABEL: @test3
|
||||
|
||||
; CHECK-NOT: load i32
|
||||
; CHECK: load i16, i16*
|
||||
; CHECK: store i16
|
||||
; CHECK: load i16, i16*
|
||||
; CHECK: ret i16
|
||||
|
||||
%_tmp9 = getelementptr %rec11, %rec11* @str, i16 0, i32 1
|
||||
%_tmp10 = load i16, i16* %_tmp9
|
||||
%_tmp12 = getelementptr %rec11, %rec11* @str, i16 0, i32 0
|
||||
store i16 %_tmp10, i16* %_tmp12
|
||||
%_tmp13 = getelementptr %rec11, %rec11* @str, i16 0, i32 0
|
||||
%_tmp14 = load i16, i16* %_tmp13
|
||||
%_tmp15 = icmp eq i16 %_tmp14, 3
|
||||
%_tmp16 = select i1 %_tmp15, i16 1, i16 0
|
||||
ret i16 %_tmp16
|
||||
}
|
||||
@ -1,44 +0,0 @@
|
||||
; RUN: opt -basicaa -load-combine -instcombine -S < %s | FileCheck %s
|
||||
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
|
||||
target triple = "x86_64-unknown-linux-gnu"
|
||||
|
||||
declare void @llvm.assume(i1) nounwind
|
||||
|
||||
; 'load' before the 'call' gets optimized:
|
||||
define i64 @test1(i32* nocapture readonly %a, i1 %b) {
|
||||
; CHECK-LABEL: @test1
|
||||
|
||||
; CHECK-DAG: load i64, i64* %1, align 4
|
||||
; CHECK-DAG: tail call void @llvm.assume(i1 %b)
|
||||
; CHECK: ret i64
|
||||
|
||||
%load1 = load i32, i32* %a, align 4
|
||||
%conv = zext i32 %load1 to i64
|
||||
%arrayidx1 = getelementptr inbounds i32, i32* %a, i64 1
|
||||
%load2 = load i32, i32* %arrayidx1, align 4
|
||||
tail call void @llvm.assume(i1 %b)
|
||||
%conv2 = zext i32 %load2 to i64
|
||||
%shl = shl nuw i64 %conv2, 32
|
||||
%add = or i64 %shl, %conv
|
||||
ret i64 %add
|
||||
}
|
||||
|
||||
; 'call' before the 'load' doesn't get optimized:
|
||||
define i64 @test2(i32* nocapture readonly %a, i1 %b) {
|
||||
; CHECK-LABEL: @test2
|
||||
|
||||
; CHECK-DAG: load i64, i64* %1, align 4
|
||||
; CHECK-DAG: tail call void @llvm.assume(i1 %b)
|
||||
; CHECK: ret i64
|
||||
|
||||
%load1 = load i32, i32* %a, align 4
|
||||
%conv = zext i32 %load1 to i64
|
||||
%arrayidx1 = getelementptr inbounds i32, i32* %a, i64 1
|
||||
tail call void @llvm.assume(i1 %b)
|
||||
%load2 = load i32, i32* %arrayidx1, align 4
|
||||
%conv2 = zext i32 %load2 to i64
|
||||
%shl = shl nuw i64 %conv2, 32
|
||||
%add = or i64 %shl, %conv
|
||||
ret i64 %add
|
||||
}
|
||||
|
||||
@ -1,19 +0,0 @@
|
||||
; RUN: opt -basicaa -load-combine -S < %s | FileCheck %s
|
||||
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
|
||||
target triple = "x86_64-unknown-linux-gnu"
|
||||
|
||||
define i32 @Load_NegGep(i32* %i){
|
||||
%1 = getelementptr inbounds i32, i32* %i, i64 -1
|
||||
%2 = load i32, i32* %1, align 4
|
||||
%3 = load i32, i32* %i, align 4
|
||||
%4 = add nsw i32 %3, %2
|
||||
ret i32 %4
|
||||
; CHECK-LABEL: @Load_NegGep(
|
||||
; CHECK: %[[load:.*]] = load i64
|
||||
; CHECK: %[[combine_extract_lo:.*]] = trunc i64 %[[load]] to i32
|
||||
; CHECK: %[[combine_extract_shift:.*]] = lshr i64 %[[load]], 32
|
||||
; CHECK: %[[combine_extract_hi:.*]] = trunc i64 %[[combine_extract_shift]] to i32
|
||||
; CHECK: %[[add:.*]] = add nsw i32 %[[combine_extract_hi]], %[[combine_extract_lo]]
|
||||
}
|
||||
|
||||
|
||||
@ -1,190 +0,0 @@
|
||||
; RUN: opt < %s -load-combine -instcombine -S | FileCheck %s
|
||||
|
||||
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
|
||||
target triple = "x86_64-unknown-linux-gnu"
|
||||
|
||||
; Combine read from char* idiom.
|
||||
define i64 @LoadU64_x64_0(i64* %pData) {
|
||||
%1 = bitcast i64* %pData to i8*
|
||||
%2 = load i8, i8* %1, align 1
|
||||
%3 = zext i8 %2 to i64
|
||||
%4 = shl nuw i64 %3, 56
|
||||
%5 = getelementptr inbounds i8, i8* %1, i64 1
|
||||
%6 = load i8, i8* %5, align 1
|
||||
%7 = zext i8 %6 to i64
|
||||
%8 = shl nuw nsw i64 %7, 48
|
||||
%9 = or i64 %8, %4
|
||||
%10 = getelementptr inbounds i8, i8* %1, i64 2
|
||||
%11 = load i8, i8* %10, align 1
|
||||
%12 = zext i8 %11 to i64
|
||||
%13 = shl nuw nsw i64 %12, 40
|
||||
%14 = or i64 %9, %13
|
||||
%15 = getelementptr inbounds i8, i8* %1, i64 3
|
||||
%16 = load i8, i8* %15, align 1
|
||||
%17 = zext i8 %16 to i64
|
||||
%18 = shl nuw nsw i64 %17, 32
|
||||
%19 = or i64 %14, %18
|
||||
%20 = getelementptr inbounds i8, i8* %1, i64 4
|
||||
%21 = load i8, i8* %20, align 1
|
||||
%22 = zext i8 %21 to i64
|
||||
%23 = shl nuw nsw i64 %22, 24
|
||||
%24 = or i64 %19, %23
|
||||
%25 = getelementptr inbounds i8, i8* %1, i64 5
|
||||
%26 = load i8, i8* %25, align 1
|
||||
%27 = zext i8 %26 to i64
|
||||
%28 = shl nuw nsw i64 %27, 16
|
||||
%29 = or i64 %24, %28
|
||||
%30 = getelementptr inbounds i8, i8* %1, i64 6
|
||||
%31 = load i8, i8* %30, align 1
|
||||
%32 = zext i8 %31 to i64
|
||||
%33 = shl nuw nsw i64 %32, 8
|
||||
%34 = or i64 %29, %33
|
||||
%35 = getelementptr inbounds i8, i8* %1, i64 7
|
||||
%36 = load i8, i8* %35, align 1
|
||||
%37 = zext i8 %36 to i64
|
||||
%38 = or i64 %34, %37
|
||||
ret i64 %38
|
||||
; CHECK-LABEL: @LoadU64_x64_0(
|
||||
; CHECK: load i64, i64* %{{.*}}, align 1
|
||||
; CHECK-NOT: load
|
||||
}
|
||||
|
||||
; Combine simple adjacent loads.
|
||||
define i32 @"2xi16_i32"(i16* %x) {
|
||||
%1 = load i16, i16* %x, align 2
|
||||
%2 = getelementptr inbounds i16, i16* %x, i64 1
|
||||
%3 = load i16, i16* %2, align 2
|
||||
%4 = zext i16 %3 to i32
|
||||
%5 = shl nuw i32 %4, 16
|
||||
%6 = zext i16 %1 to i32
|
||||
%7 = or i32 %5, %6
|
||||
ret i32 %7
|
||||
; CHECK-LABEL: @"2xi16_i32"(
|
||||
; CHECK: load i32, i32* %{{.*}}, align 2
|
||||
; CHECK-NOT: load
|
||||
}
|
||||
|
||||
; Don't combine loads across stores.
|
||||
define i32 @"2xi16_i32_store"(i16* %x, i16* %y) {
|
||||
%1 = load i16, i16* %x, align 2
|
||||
store i16 0, i16* %y, align 2
|
||||
%2 = getelementptr inbounds i16, i16* %x, i64 1
|
||||
%3 = load i16, i16* %2, align 2
|
||||
%4 = zext i16 %3 to i32
|
||||
%5 = shl nuw i32 %4, 16
|
||||
%6 = zext i16 %1 to i32
|
||||
%7 = or i32 %5, %6
|
||||
ret i32 %7
|
||||
; CHECK-LABEL: @"2xi16_i32_store"(
|
||||
; CHECK: load i16, i16* %{{.*}}, align 2
|
||||
; CHECK: store
|
||||
; CHECK: load i16, i16* %{{.*}}, align 2
|
||||
}
|
||||
|
||||
; Don't combine loads with a gap.
|
||||
define i32 @"2xi16_i32_gap"(i16* %x) {
|
||||
%1 = load i16, i16* %x, align 2
|
||||
%2 = getelementptr inbounds i16, i16* %x, i64 2
|
||||
%3 = load i16, i16* %2, align 2
|
||||
%4 = zext i16 %3 to i32
|
||||
%5 = shl nuw i32 %4, 16
|
||||
%6 = zext i16 %1 to i32
|
||||
%7 = or i32 %5, %6
|
||||
ret i32 %7
|
||||
; CHECK-LABEL: @"2xi16_i32_gap"(
|
||||
; CHECK: load i16, i16* %{{.*}}, align 2
|
||||
; CHECK: load i16, i16* %{{.*}}, align 2
|
||||
}
|
||||
|
||||
; Combine out of order loads.
|
||||
define i32 @"2xi16_i32_order"(i16* %x) {
|
||||
%1 = getelementptr inbounds i16, i16* %x, i64 1
|
||||
%2 = load i16, i16* %1, align 2
|
||||
%3 = zext i16 %2 to i32
|
||||
%4 = load i16, i16* %x, align 2
|
||||
%5 = shl nuw i32 %3, 16
|
||||
%6 = zext i16 %4 to i32
|
||||
%7 = or i32 %5, %6
|
||||
ret i32 %7
|
||||
; CHECK-LABEL: @"2xi16_i32_order"(
|
||||
; CHECK: load i32, i32* %{{.*}}, align 2
|
||||
; CHECK-NOT: load
|
||||
}
|
||||
|
||||
; Overlapping loads.
|
||||
define i32 @"2xi16_i32_overlap"(i8* %x) {
|
||||
%1 = bitcast i8* %x to i16*
|
||||
%2 = load i16, i16* %1, align 2
|
||||
%3 = getelementptr inbounds i8, i8* %x, i64 1
|
||||
%4 = bitcast i8* %3 to i16*
|
||||
%5 = load i16, i16* %4, align 2
|
||||
%6 = zext i16 %5 to i32
|
||||
%7 = shl nuw i32 %6, 16
|
||||
%8 = zext i16 %2 to i32
|
||||
%9 = or i32 %7, %8
|
||||
ret i32 %9
|
||||
; CHECK-LABEL: @"2xi16_i32_overlap"(
|
||||
; CHECK: load i16, i16* %{{.*}}, align 2
|
||||
; CHECK: load i16, i16* %{{.*}}, align 2
|
||||
}
|
||||
|
||||
; Combine valid alignments.
|
||||
define i64 @"2xi16_i64_align"(i8* %x) {
|
||||
%1 = bitcast i8* %x to i32*
|
||||
%2 = load i32, i32* %1, align 4
|
||||
%3 = getelementptr inbounds i8, i8* %x, i64 4
|
||||
%4 = bitcast i8* %3 to i16*
|
||||
%5 = load i16, i16* %4, align 2
|
||||
%6 = getelementptr inbounds i8, i8* %x, i64 6
|
||||
%7 = bitcast i8* %6 to i16*
|
||||
%8 = load i16, i16* %7, align 2
|
||||
%9 = zext i16 %8 to i64
|
||||
%10 = shl nuw i64 %9, 48
|
||||
%11 = zext i16 %5 to i64
|
||||
%12 = shl nuw nsw i64 %11, 32
|
||||
%13 = zext i32 %2 to i64
|
||||
%14 = or i64 %12, %13
|
||||
%15 = or i64 %14, %10
|
||||
ret i64 %15
|
||||
; CHECK-LABEL: @"2xi16_i64_align"(
|
||||
; CHECK: load i64, i64* %{{.*}}, align 4
|
||||
}
|
||||
|
||||
; Non power of two.
|
||||
define i64 @"2xi16_i64_npo2"(i8* %x) {
|
||||
%1 = load i8, i8* %x, align 1
|
||||
%2 = zext i8 %1 to i64
|
||||
%3 = getelementptr inbounds i8, i8* %x, i64 1
|
||||
%4 = load i8, i8* %3, align 1
|
||||
%5 = zext i8 %4 to i64
|
||||
%6 = shl nuw nsw i64 %5, 8
|
||||
%7 = or i64 %6, %2
|
||||
%8 = getelementptr inbounds i8, i8* %x, i64 2
|
||||
%9 = load i8, i8* %8, align 1
|
||||
%10 = zext i8 %9 to i64
|
||||
%11 = shl nuw nsw i64 %10, 16
|
||||
%12 = or i64 %11, %7
|
||||
%13 = getelementptr inbounds i8, i8* %x, i64 3
|
||||
%14 = load i8, i8* %13, align 1
|
||||
%15 = zext i8 %14 to i64
|
||||
%16 = shl nuw nsw i64 %15, 24
|
||||
%17 = or i64 %16, %12
|
||||
%18 = getelementptr inbounds i8, i8* %x, i64 4
|
||||
%19 = load i8, i8* %18, align 1
|
||||
%20 = zext i8 %19 to i64
|
||||
%21 = shl nuw nsw i64 %20, 32
|
||||
%22 = or i64 %21, %17
|
||||
%23 = getelementptr inbounds i8, i8* %x, i64 5
|
||||
%24 = load i8, i8* %23, align 1
|
||||
%25 = zext i8 %24 to i64
|
||||
%26 = shl nuw nsw i64 %25, 40
|
||||
%27 = or i64 %26, %22
|
||||
%28 = getelementptr inbounds i8, i8* %x, i64 6
|
||||
%29 = load i8, i8* %28, align 1
|
||||
%30 = zext i8 %29 to i64
|
||||
%31 = shl nuw nsw i64 %30, 48
|
||||
%32 = or i64 %31, %27
|
||||
ret i64 %32
|
||||
; CHECK-LABEL: @"2xi16_i64_npo2"(
|
||||
; CHECK: load i32, i32* %{{.*}}, align 1
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user