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[mips] Disable code generation through FastISel for MIPS32R6.

Reviewers: dsanders

Subscribers: llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D14708

llvm-svn: 253225
This commit is contained in:
Vasileios Kalintiris 2015-11-16 17:05:01 +00:00
parent f6fa662c51
commit 21cad2df6b
2 changed files with 30 additions and 3 deletions

View File

@ -192,10 +192,10 @@ public:
TII(*Subtarget->getInstrInfo()), TLI(*Subtarget->getTargetLowering()) {
MFI = funcInfo.MF->getInfo<MipsFunctionInfo>();
Context = &funcInfo.Fn->getContext();
bool ISASupported = !Subtarget->hasMips32r6() && Subtarget->hasMips32();
TargetSupported =
((TM.getRelocationModel() == Reloc::PIC_) &&
((Subtarget->hasMips32r2() || Subtarget->hasMips32()) &&
(static_cast<const MipsTargetMachine &>(TM).getABI().IsO32())));
ISASupported && (TM.getRelocationModel() == Reloc::PIC_) &&
(static_cast<const MipsTargetMachine &>(TM).getABI().IsO32());
UnsupportedFPMode = Subtarget->isFP64bit();
}

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@ -0,0 +1,27 @@
; RUN: llc -march=mips -mcpu=mips2 -O0 -relocation-model=pic \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
; RUN: llc -march=mips -mcpu=mips3 -O0 -relocation-model=pic \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
; RUN: llc -march=mips -mcpu=mips4 -O0 -relocation-model=pic \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
; RUN: llc -march=mips -mcpu=mips32r6 -O0 -relocation-model=pic \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
; RUN: llc -march=mips -mcpu=mips64 -O0 -relocation-model=pic \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
; RUN: llc -march=mips -mcpu=mips64r2 -O0 -relocation-model=pic \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
; RUN: llc -march=mips -mcpu=mips64r3 -O0 -relocation-model=pic \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
; RUN: llc -march=mips -mcpu=mips64r5 -O0 -relocation-model=pic \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
; RUN: llc -march=mips -mcpu=mips32r6 -O0 -relocation-model=pic \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
; CHECK: FastISel missed terminator: ret i32 0
define i32 @foo() {
entry:
ret i32 0
}