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[XRay] Change ARM/AArch64/powerpc64le to use version 2 sled (PC-relative address)

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Follow-up of D78082 (x86-64).

This change avoids dynamic relocations in `xray_instr_map` for ARM/AArch64/powerpc64le.

MIPS64 cannot use 64-bit PC-relative addresses because R_MIPS_PC64 is not defined.
Because MIPS32 shares the same code, for simplicity, we don't use PC-relative addresses for MIPS32 as well.

Tested on AArch64 Linux and ppc64le Linux.

Reviewed By: ianlevesque

Differential Revision: https://reviews.llvm.org/D78590
This commit is contained in:
Fangrui Song 2020-04-21 11:31:15 -07:00
parent 0a8edb5bc1
commit 21cd444174
8 changed files with 27 additions and 22 deletions
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5
lib/CodeGen/AsmPrinter/AsmPrinter.cpp
View File

@ -3201,8 +3201,9 @@ void AsmPrinter::emitXRayTable() {
MCSection *InstMap = nullptr;
MCSection *FnSledIndex = nullptr;
const Triple &TT = TM.getTargetTriple();
// Version 2 uses a PC-relative address on all supported targets.
bool PCRel = TT.isX86();
// Use PC-relative addresses on all targets except MIPS (MIPS64 cannot use
// PC-relative addresses because R_MIPS_PC64 does not exist).
bool PCRel = !TT.isMIPS();
if (TT.isOSBinFormatELF()) {
auto LinkedToSym = cast<MCSymbolELF>(CurrentFnSym);
auto Flags = ELF::SHF_ALLOC | ELF::SHF_LINK_ORDER;

2
lib/Target/AArch64/AArch64AsmPrinter.cpp
View File

@ -313,7 +313,7 @@ void AArch64AsmPrinter::EmitSled(const MachineInstr &MI, SledKind Kind)
EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::HINT).addImm(0));
OutStreamer->emitLabel(Target);
recordSled(CurSled, MI, Kind);
recordSled(CurSled, MI, Kind, 2);
}
void AArch64AsmPrinter::LowerHWASAN_CHECK_MEMACCESS(const MachineInstr &MI) {

2
lib/Target/ARM/ARMMCInstLower.cpp
View File

@ -210,7 +210,7 @@ void ARMAsmPrinter::EmitSled(const MachineInstr &MI, SledKind Kind)
emitNops(NoopsInSledCount);
OutStreamer->emitLabel(Target);
recordSled(CurSled, MI, Kind);
recordSled(CurSled, MI, Kind, 2);
}
void ARMAsmPrinter::LowerPATCHABLE_FUNCTION_ENTER(const MachineInstr &MI)

4
lib/Target/PowerPC/PPCAsmPrinter.cpp
View File

@ -1181,7 +1181,7 @@ void PPCLinuxAsmPrinter::emitInstruction(const MachineInstr *MI) {
OutContext)));
EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0));
OutStreamer->emitLabel(EndOfSled);
recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER);
recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER, 2);
break;
}
case TargetOpcode::PATCHABLE_RET: {
@ -1269,7 +1269,7 @@ void PPCLinuxAsmPrinter::emitInstruction(const MachineInstr *MI) {
EmitToStreamer(*OutStreamer, RetInst);
if (IsConditional)
OutStreamer->emitLabel(FallthroughLabel);
recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT);
recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT, 2);
break;
}
case TargetOpcode::PATCHABLE_FUNCTION_EXIT:

12
test/CodeGen/AArch64/xray-tail-call-sled.ll
View File

@ -28,9 +28,11 @@ define i32 @callee() nounwind noinline uwtable "function-instrument"="xray-alway
; CHECK-NEXT: ret
}
; CHECK-LABEL: xray_instr_map
; CHECK-LABEL: Lxray_sleds_start0:
; CHECK: .xword .Lxray_sled_0
; CHECK: .xword .Lxray_sled_1
; CHECK-LABEL: .Lxray_sleds_start0:
; CHECK-NEXT: .Ltmp2:
; CHECK: .xword .Lxray_sled_0-.Ltmp2
; CHECK: .Ltmp3:
; CHECK-NEXT: .xword .Lxray_sled_1-.Ltmp3
; CHECK-LABEL: Lxray_sleds_end0:
; CHECK-LABEL: xray_fn_idx
; CHECK: .xword .Lxray_sleds_start0
@ -47,7 +49,7 @@ define i32 @caller() nounwind noinline uwtable "function-instrument"="xray-alway
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-LABEL: .Ltmp2:
; CHECK-LABEL: .Ltmp4:
; CHECK: .p2align 2
; CHECK-LABEL: Lxray_sled_3:
; CHECK-NEXT: b #32
@ -58,7 +60,7 @@ define i32 @caller() nounwind noinline uwtable "function-instrument"="xray-alway
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-LABEL: .Ltmp3:
; CHECK-LABEL: .Ltmp5:
%retval = tail call i32 @callee()
; CHECK: b callee
ret i32 %retval

4
test/CodeGen/ARM/xray-tail-call-sled.ll
View File

@ -37,7 +37,7 @@ define i32 @caller() nounwind noinline uwtable "function-instrument"="xray-alway
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-LABEL: Ltmp2:
; CHECK-LABEL: Ltmp4:
; CHECK: .p2align 2
; CHECK-LABEL: Lxray_sled_3:
; CHECK-NEXT: b #20
@ -47,7 +47,7 @@ define i32 @caller() nounwind noinline uwtable "function-instrument"="xray-alway
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-LABEL: Ltmp3:
; CHECK-LABEL: Ltmp5:
%retval = tail call i32 @callee()
; CHECK: b {{.*}}callee
ret i32 %retval

12
test/CodeGen/PowerPC/xray-attribute-instrumentation.ll
View File

@ -22,19 +22,21 @@ define i32 @foo() nounwind noinline uwtable "function-instrument"="xray-always"
; CHECK-NEXT: nop
; CHECK-NEXT: mtlr 0
}
; CHECK-LABEL: xray_instr_map,"awo",@progbits,foo{{$}}
; CHECK-LABEL: xray_instr_map,"ao",@progbits,foo{{$}}
; CHECK: .Lxray_sleds_start0:
; CHECK-NEXT: .quad .Ltmp0
; CHECK-NEXT: .Ltmp3:
; CHECK-NEXT: .quad .Ltmp0-.Ltmp3
; CHECK-NEXT: .quad foo
; CHECK-NEXT: .byte 0x00
; CHECK-NEXT: .byte 0x01
; CHECK-NEXT: .byte 0x00
; CHECK-NEXT: .byte 0x02
; CHECK-NEXT: .space 13
; CHECK-NEXT: .quad .Ltmp2
; CHECK-NEXT: .Ltmp4:
; CHECK-NEXT: .quad .Ltmp2-.Ltmp4
; CHECK-NEXT: .quad foo
; CHECK-NEXT: .byte 0x01
; CHECK-NEXT: .byte 0x01
; CHECK-NEXT: .byte 0x00
; CHECK-NEXT: .byte 0x02
; CHECK-NEXT: .space 13
; CHECK-NEXT: .Lxray_sleds_end0:
; CHECK-LABEL: xray_fn_idx,"awo",@progbits,foo{{$}}

8
test/CodeGen/PowerPC/xray-tail-call-sled.ll
View File

@ -22,18 +22,18 @@ define i32 @callee() nounwind noinline uwtable "function-instrument"="xray-alway
}
define i32 @caller() nounwind noinline uwtable "function-instrument"="xray-always" {
; CHECK-LABEL: .Ltmp3:
; CHECK: b .Ltmp4
; CHECK-LABEL: .Ltmp5:
; CHECK-NEXT: b .Ltmp6
; CHECK-NEXT: nop
; CHECK-NEXT: std 0, -8(1)
; CHECK-NEXT: mflr 0
; CHECK-NEXT: bl __xray_FunctionEntry
; CHECK-NEXT: nop
; CHECK-NEXT: mtlr 0
; CHECK-LABEL: .Ltmp4:
; CHECK-LABEL: .Ltmp6:
%retval = tail call i32 @callee()
ret i32 %retval
; CHECK-LABEL: .Ltmp5:
; CHECK-LABEL: .Ltmp7:
; CHECK: blr
; CHECK-NEXT: nop
; CHECK-NEXT: std 0, -8(1)