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[x86] add test for shift+op+concat; NFC
D79360 could change this kind of sequence.
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@ -181,6 +181,27 @@ define <8 x i32> @vshift08(<8 x i32> %a) {
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ret <8 x i32> %bitop
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}
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define <8 x i32> @vshift08_add(<8 x i32> %a, <8 x i32> %y) {
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; CHECK-LABEL: vshift08_add:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpslld $23, %xmm0, %xmm2
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; CHECK-NEXT: vmovdqa {{.*#+}} xmm3 = [1065353216,1065353216,1065353216,1065353216]
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; CHECK-NEXT: vpaddd %xmm3, %xmm2, %xmm2
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; CHECK-NEXT: vcvttps2dq %xmm2, %xmm2
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; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm0
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; CHECK-NEXT: vpslld $23, %xmm0, %xmm0
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; CHECK-NEXT: vpaddd %xmm3, %xmm0, %xmm0
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; CHECK-NEXT: vcvttps2dq %xmm0, %xmm0
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; CHECK-NEXT: vextractf128 $1, %ymm1, %xmm3
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; CHECK-NEXT: vpaddd %xmm3, %xmm0, %xmm0
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; CHECK-NEXT: vpaddd %xmm1, %xmm2, %xmm1
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; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
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; CHECK-NEXT: retq
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%bitop = shl <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>, %a
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%r = add <8 x i32> %bitop, %y
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ret <8 x i32> %r
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}
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; PR15141
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define <4 x i32> @vshift13(<4 x i32> %in) {
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; CHECK-LABEL: vshift13:
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