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Remove dead code. These ARM instruction definitions no longer exist.

llvm-svn: 127509
This commit is contained in:
Jim Grosbach 2011-03-11 23:15:02 +00:00
parent 01a937ac07
commit 2226dfbea2
2 changed files with 1 additions and 9 deletions

View File

@ -2168,7 +2168,7 @@ SDNode *ARMDAGToDAGISel::SelectCMOVOp(SDNode *N) {
// Emits: (tMOVCCr:i32 GPR:i32:$false, GPR:i32:$true, (imm:i32):$cc)
// Pattern complexity = 6 cost = 11 size = 0
//
// Also FCPYScc and FCPYDcc.
// Also VMOVScc and VMOVDcc.
SDValue Tmp2 = CurDAG->getTargetConstant(CCVal, MVT::i32);
SDValue Ops[] = { FalseVal, TrueVal, Tmp2, CCR, InFlag };
unsigned Opc = 0;

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@ -1592,14 +1592,6 @@ ARMDEBackend::populateInstruction(const CodeGenInstruction &CGI,
// better off using the generic RSCri and RSCrs instructions.
if (Name == "RSCSri" || Name == "RSCSrs") return false;
// FCYPScc, FCYPDcc, FNEGScc, and FNEGDcc are used in the compiler
// to implement conditional moves. We can ignore them in favor of
// their more generic versions of instructions. See also
// SDNode *ARMDAGToDAGISel::Select(SDValue Op).
if (Name == "FCPYScc" || Name == "FCPYDcc" || Name == "FNEGScc" ||
Name == "FNEGDcc")
return false;
// Bcc is in a more generic form than B. Ignore B when decoding.
if (Name == "B") return false;