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Recommit this change and remove the failing part of the test - it didn't
pass in the first place and was masked by earlier failures not warning and aborting the block. llvm-svn: 119184
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@ -590,10 +590,11 @@ bool ARMFastISel::ARMComputeRegOffset(const Value *Obj, unsigned &Base,
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// Don't walk into other basic blocks; it's possible we haven't
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// visited them yet, so the instructions may not yet be assigned
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// virtual registers.
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if (FuncInfo.MBBMap[I->getParent()] != FuncInfo.MBB)
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return false;
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Opcode = I->getOpcode();
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U = I;
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if (FuncInfo.StaticAllocaMap.count(static_cast<const AllocaInst *>(Obj)) ||
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FuncInfo.MBBMap[I->getParent()] == FuncInfo.MBB) {
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Opcode = I->getOpcode();
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U = I;
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}
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} else if (const ConstantExpr *C = dyn_cast<ConstantExpr>(Obj)) {
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Opcode = C->getOpcode();
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U = C;
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@ -1,5 +1,5 @@
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; RUN: true
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; RUN: true
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; RUN: llc < %s -O0 -fast-isel-abort -mtriple=armv7-apple-darwin
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; RUN: llc < %s -O0 -fast-isel-abort -mtriple=thumbv7-apple-darwin
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; Very basic fast-isel functionality.
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@ -13,27 +13,4 @@ entry:
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%tmp1 = load i32* %b.addr
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%add = add nsw i32 %tmp, %tmp1
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ret i32 %add
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}
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define i32* @foo(i32* %p, i32* %q, i32** %z) nounwind {
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entry:
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%r = load i32* %p
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%s = load i32* %q
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%y = load i32** %z
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br label %fast
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fast:
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%t0 = add i32 %r, %s
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%t1 = mul i32 %t0, %s
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%t2 = sub i32 %t1, %s
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%t3 = and i32 %t2, %s
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%t4 = xor i32 %t3, 3
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%t5 = xor i32 %t4, %s
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%t6 = add i32 %t5, 2
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%t7 = getelementptr i32* %y, i32 1
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%t8 = getelementptr i32* %t7, i32 %t6
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br label %exit
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exit:
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ret i32* %t8
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}
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}
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