mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-23 13:02:52 +02:00
Strange as it may sound, we'll not use LDD/STD to store longs. For reasons of
representational consistency, we want to address the halves of each 64-bit value separately. llvm-svn: 14356
This commit is contained in:
parent
ac14491ad0
commit
236ef1542c
@ -546,7 +546,8 @@ void V8ISel::visitLoadInst(LoadInst &I) {
|
||||
BuildMI (BB, V8::LDmr, 1, DestReg).addReg (PtrReg).addSImm(0);
|
||||
return;
|
||||
case cLong:
|
||||
BuildMI (BB, V8::LDDmr, 1, DestReg).addReg (PtrReg).addSImm(0);
|
||||
BuildMI (BB, V8::LDmr, 1, DestReg).addReg (PtrReg).addSImm(0);
|
||||
BuildMI (BB, V8::LDmr, 1, DestReg+1).addReg (PtrReg).addSImm(4);
|
||||
return;
|
||||
default:
|
||||
std::cerr << "Load instruction not handled: " << I;
|
||||
@ -570,7 +571,8 @@ void V8ISel::visitStoreInst(StoreInst &I) {
|
||||
BuildMI (BB, V8::STrm, 3).addReg (PtrReg).addSImm (0).addReg (SrcReg);
|
||||
return;
|
||||
case cLong:
|
||||
BuildMI (BB, V8::STDrm, 3).addReg (PtrReg).addSImm (0).addReg (SrcReg);
|
||||
BuildMI (BB, V8::STrm, 3).addReg (PtrReg).addSImm (0).addReg (SrcReg);
|
||||
BuildMI (BB, V8::STrm, 3).addReg (PtrReg).addSImm (4).addReg (SrcReg+1);
|
||||
return;
|
||||
default:
|
||||
std::cerr << "Store instruction not handled: " << I;
|
||||
|
Loading…
Reference in New Issue
Block a user