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[MachineOutliner] Don't outline instructions that modify SP.
This breaks the code which saves and restores LR, so we can't outline without doing something more complicated for stack adjustment. Found by inspection; we get lucky in most cases because getMemOpInfo only handles STRWpost, not any other pre/post-increment forms. But it hits a couple of artificial testcases in the tree. Differential Revision: https://reviews.llvm.org/D46920 llvm-svn: 332529
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@ -5188,6 +5188,12 @@ AArch64InstrInfo::getOutliningType(MachineBasicBlock::iterator &MIT,
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if (!MightNeedStackFixUp)
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return MachineOutlinerInstrType::Legal;
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// Any modification of SP will break our code to save/restore LR.
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// FIXME: We could handle some instructions which add a constant offset to
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// SP, with a bit more work.
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if (MI.modifiesRegister(AArch64::SP, &RI))
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return MachineOutlinerInstrType::Illegal;
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// At this point, we have a stack instruction that we might need to fix
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// up. We'll handle it if it's a load or store.
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if (MI.mayLoadOrStore()) {
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@ -5217,6 +5223,8 @@ AArch64InstrInfo::getOutliningType(MachineBasicBlock::iterator &MIT,
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return MachineOutlinerInstrType::Legal;
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}
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// FIXME: Add handling for instructions like "add x0, sp, #8".
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// We can't fix it up, so don't outline it.
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return MachineOutlinerInstrType::Illegal;
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}
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@ -4,9 +4,9 @@
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; CHECK-SAME: Instructions from outlining all occurrences (9) >=
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; CHECK-SAME: Unoutlined instruction count (4)
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; CHECK-SAME: (Also found at: machine-outliner-remarks.ll:13:9)
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; CHECK: remark: <unknown>:0:0: Saved 5 instructions by outlining 7 instructions
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; CHECK-SAME: from 2 locations. (Found at: machine-outliner-remarks.ll:27:9,
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; CHECK-SAME: machine-outliner-remarks.ll:36:1)
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; CHECK: remark: <unknown>:0:0: Saved 5 instructions by outlining 12 instructions
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; CHECK-SAME: from 2 locations. (Found at: machine-outliner-remarks.ll:36:1,
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; CHECK-SAME: machine-outliner-remarks.ll:27:9)
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; RUN: llc %s -enable-machine-outliner -mtriple=aarch64-unknown-unknown -o /dev/null -pass-remarks-missed=machine-outliner -pass-remarks-output=%t.yaml
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; RUN: cat %t.yaml | FileCheck %s -check-prefix=YAML
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; YAML: --- !Missed
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@ -40,17 +40,17 @@
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; YAML-NEXT: - OutliningBenefit: '5'
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; YAML-NEXT: - String: ' instructions by '
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; YAML-NEXT: - String: 'outlining '
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; YAML-NEXT: - Length: '7'
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; YAML-NEXT: - Length: '12'
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; YAML-NEXT: - String: ' instructions '
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; YAML-NEXT: - String: 'from '
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; YAML-NEXT: - NumOccurrences: '2'
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; YAML-NEXT: - String: ' locations. '
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; YAML-NEXT: - String: '(Found at: '
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; YAML-NEXT: - StartLoc0: 'machine-outliner-remarks.ll:27:9'
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; YAML-NEXT: DebugLoc: { File: machine-outliner-remarks.ll, Line: 27, Column: 9 }
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; YAML-NEXT: - String: ', '
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; YAML-NEXT: - StartLoc1: 'machine-outliner-remarks.ll:36:1'
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; YAML-NEXT: - StartLoc0: 'machine-outliner-remarks.ll:36:1'
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; YAML-NEXT: DebugLoc: { File: machine-outliner-remarks.ll, Line: 36, Column: 1 }
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; YAML-NEXT: - String: ', '
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; YAML-NEXT: - StartLoc1: 'machine-outliner-remarks.ll:27:9'
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; YAML-NEXT: DebugLoc: { File: machine-outliner-remarks.ll, Line: 27, Column: 9 }
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; YAML-NEXT: - String: ')'
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define void @dog() #0 !dbg !8 {
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@ -76,10 +76,14 @@ define void @foo() #0 !dbg !18 {
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%2 = alloca i32, align 4
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%3 = alloca i32, align 4
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%4 = alloca i32, align 4
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store i32 0, i32* %1, align 4
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store i32 1, i32* %2, align 4, !dbg !24
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store i32 2, i32* %3, align 4
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store i32 3, i32* %4, align 4, !dbg !26
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%5 = alloca i32, align 4
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%6 = alloca i32, align 4
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store i32 1, i32* %1, align 4, !dbg !24
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store i32 2, i32* %2, align 4
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store i32 3, i32* %3, align 4
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store i32 4, i32* %4, align 4
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store i32 5, i32* %5, align 4
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store i32 6, i32* %6, align 4, !dbg !26
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ret void
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}
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@ -88,10 +92,14 @@ define void @bar() #0 !dbg !27 {
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%2 = alloca i32, align 4
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%3 = alloca i32, align 4
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%4 = alloca i32, align 4
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store i32 0, i32* %1, align 4
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store i32 1, i32* %2, align 4, !dbg !33
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store i32 2, i32* %3, align 4
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store i32 3, i32* %4, align 4, !dbg !35
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%5 = alloca i32, align 4
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%6 = alloca i32, align 4
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store i32 1, i32* %1, align 4, !dbg !33
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store i32 2, i32* %2, align 4
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store i32 3, i32* %3, align 4
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store i32 4, i32* %4, align 4
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store i32 5, i32* %5, align 4
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store i32 6, i32* %6, align 4, !dbg !35
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ret void
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}
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@ -6,15 +6,18 @@ define linkonce_odr void @fish() #0 {
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; CHECK-LABEL: _fish:
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; CHECK-NOT: OUTLINED
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; ODR: [[OUTLINED:OUTLINED_FUNCTION_[0-9]+]]
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; ODR-NOT: ret
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%1 = alloca i32, align 4
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%2 = alloca i32, align 4
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%3 = alloca i32, align 4
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%4 = alloca i32, align 4
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store i32 0, i32* %1, align 4
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store i32 1, i32* %2, align 4
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store i32 2, i32* %3, align 4
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store i32 3, i32* %4, align 4
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%5 = alloca i32, align 4
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%6 = alloca i32, align 4
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store i32 1, i32* %1, align 4
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store i32 2, i32* %2, align 4
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store i32 3, i32* %3, align 4
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store i32 4, i32* %4, align 4
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store i32 5, i32* %5, align 4
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store i32 6, i32* %6, align 4
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ret void
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}
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@ -26,10 +29,14 @@ define void @turtle() section "TURTLE,turtle" {
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%2 = alloca i32, align 4
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%3 = alloca i32, align 4
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%4 = alloca i32, align 4
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store i32 0, i32* %1, align 4
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store i32 1, i32* %2, align 4
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store i32 2, i32* %3, align 4
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store i32 3, i32* %4, align 4
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%5 = alloca i32, align 4
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%6 = alloca i32, align 4
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store i32 1, i32* %1, align 4
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store i32 2, i32* %2, align 4
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store i32 3, i32* %3, align 4
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store i32 4, i32* %4, align 4
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store i32 5, i32* %5, align 4
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store i32 6, i32* %6, align 4
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ret void
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}
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@ -37,16 +44,18 @@ define void @cat() #0 {
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; CHECK-LABEL: _cat:
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; CHECK: [[OUTLINED:OUTLINED_FUNCTION_[0-9]+]]
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; ODR: [[OUTLINED]]
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; CHECK-NOT: ret
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; ODR-NOT: ret
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%1 = alloca i32, align 4
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%2 = alloca i32, align 4
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%3 = alloca i32, align 4
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%4 = alloca i32, align 4
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store i32 0, i32* %1, align 4
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store i32 1, i32* %2, align 4
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store i32 2, i32* %3, align 4
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store i32 3, i32* %4, align 4
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%5 = alloca i32, align 4
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%6 = alloca i32, align 4
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store i32 1, i32* %1, align 4
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store i32 2, i32* %2, align 4
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store i32 3, i32* %3, align 4
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store i32 4, i32* %4, align 4
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store i32 5, i32* %5, align 4
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store i32 6, i32* %6, align 4
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ret void
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}
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@ -54,28 +63,36 @@ define void @dog() #0 {
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; CHECK-LABEL: _dog:
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; CHECK: [[OUTLINED]]
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; ODR: [[OUTLINED]]
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; CHECK-NOT: ret
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; ODR-NOT: ret
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%1 = alloca i32, align 4
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%2 = alloca i32, align 4
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%3 = alloca i32, align 4
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%4 = alloca i32, align 4
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store i32 0, i32* %1, align 4
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store i32 1, i32* %2, align 4
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store i32 2, i32* %3, align 4
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store i32 3, i32* %4, align 4
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%5 = alloca i32, align 4
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%6 = alloca i32, align 4
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store i32 1, i32* %1, align 4
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store i32 2, i32* %2, align 4
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store i32 3, i32* %3, align 4
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store i32 4, i32* %4, align 4
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store i32 5, i32* %5, align 4
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store i32 6, i32* %6, align 4
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ret void
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}
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; ODR: [[OUTLINED]]:
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; CHECK: .p2align 2
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; CHECK-NEXT: [[OUTLINED]]:
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; CHECK-DAG: orr w8, wzr, #0x1
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; CHECK-NEXT: stp w8, wzr, [sp, #8]
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; CHECK-NEXT: orr w8, wzr, #0x2
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; CHECK-NEXT: str w8, [sp, #4]
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; CHECK-NEXT: orr w8, wzr, #0x3
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; CHECK-NEXT: str w8, [sp], #16
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; CHECK: orr w8, wzr, #0x1
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; CHECK-NEXT: str w8, [sp, #44]
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; CHECK-NEXT: orr w8, wzr, #0x2
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; CHECK-NEXT: str w8, [sp, #40]
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; CHECK-NEXT: orr w8, wzr, #0x3
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; CHECK-NEXT: str w8, [sp, #36]
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; CHECK-NEXT: orr w8, wzr, #0x4
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; CHECK-NEXT: str w8, [sp, #32]
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; CHECK-NEXT: mov w8, #5
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; CHECK-NEXT: str w8, [sp, #28]
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; CHECK-NEXT: orr w8, wzr, #0x6
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; CHECK-NEXT: str w8, [sp, #24]
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; CHECK-NEXT: ret
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attributes #0 = { noredzone "target-cpu"="cyclone" }
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