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[AArch64][GlobalISel] Lower G_FSHL and G_FSHR.
Codegen isn't as good as we need it, but that'll be done later.
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@ -700,6 +700,8 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
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getActionDefinitionsBuilder({G_UADDSAT, G_USUBSAT})
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.lowerIf([=](const LegalityQuery &Q) { return Q.Types[0].isScalar(); });
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getActionDefinitionsBuilder({G_FSHL, G_FSHR}).lower();
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computeTables();
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verify(*ST.getInstrInfo());
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}
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66
test/CodeGen/AArch64/GlobalISel/legalize-fshl.mir
Normal file
66
test/CodeGen/AArch64/GlobalISel/legalize-fshl.mir
Normal file
@ -0,0 +1,66 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 -mtriple=arm64-unknown-unknown -global-isel -run-pass=legalizer -global-isel-abort=1 %s -o - | FileCheck %s
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---
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name: test_s32
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0, $w1
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; CHECK-LABEL: name: test_s32
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; CHECK: liveins: $w0, $w1
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
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; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
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; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
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; CHECK: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY1]], [[C1]]
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; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[XOR]], [[C]]
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; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[AND]](s32)
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; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
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; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C2]](s64)
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; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LSHR]], [[AND1]](s32)
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; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[SHL]], [[LSHR1]]
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; CHECK: $w0 = COPY [[OR]](s32)
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; CHECK: RET_ReallyLR implicit $w0
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%0:_(s32) = COPY $w0
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%1:_(s32) = COPY $w1
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%2:_(s32) = G_FSHL %0(s32), %0, %1
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$w0 = COPY %2(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: test_s64
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0, $x1
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; CHECK-LABEL: name: test_s64
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; CHECK: liveins: $x0, $x1
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; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
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; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 63
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; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]]
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; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
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; CHECK: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[COPY1]], [[C1]]
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; CHECK: [[AND1:%[0-9]+]]:_(s64) = G_AND [[XOR]], [[C]]
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; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
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; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[AND]](s64)
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; CHECK: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[COPY]], [[C2]](s64)
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; CHECK: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[LSHR]], [[AND1]](s64)
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; CHECK: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR1]]
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; CHECK: $x0 = COPY [[OR]](s64)
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; CHECK: RET_ReallyLR implicit $x0
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%0:_(s64) = COPY $x0
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%1:_(s64) = COPY $x1
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%2:_(s64) = G_FSHL %0(s64), %0, %1(s64)
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$x0 = COPY %2(s64)
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RET_ReallyLR implicit $x0
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...
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@ -285,11 +285,12 @@
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# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
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# DEBUG-NEXT: G_FSHL (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
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# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
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# DEBUG-NEXT: G_FSHR (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
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# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
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# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
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# DEBUG-NEXT: G_ICMP (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
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# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
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