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[PowerPC][NFC] Add tests for some missed optimization opportunities in combineSetCC
For both operands are bool, short, int, long, long long, add the following optimization test case. 1. 0-x == y --> x+y ==0 2. 0-x != y --> x+y != 0 Review: nemanjai Differential Revision: https://reviews.llvm.org/D53358 llvm-svn: 345365
This commit is contained in:
Li Jia He
parent
40255c0083
commit
23d7dd61df
436
test/CodeGen/PowerPC/combine-setcc.ll
Normal file
436
test/CodeGen/PowerPC/combine-setcc.ll
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@ -0,0 +1,436 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-unknown \
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; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \
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; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s
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define zeroext i1 @eq1(i1 zeroext %x, i1 zeroext %y) {
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; CHECK-LABEL: eq1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: neg r3, r3
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; CHECK-NEXT: xor r3, r3, r4
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: blr
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%sub = sext i1 %x to i32
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%conv3 = zext i1 %y to i32
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%cmp = icmp eq i32 %sub, %conv3
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ret i1 %cmp
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}
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define zeroext i8 @eq2(i8 zeroext %x, i8 zeroext %y) {
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; CHECK-LABEL: eq2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: neg r3, r3
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; CHECK-NEXT: xor r3, r3, r4
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: blr
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%conv = zext i8 %x to i32
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%sub = sub nsw i32 0, %conv
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%conv1 = zext i8 %y to i32
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%cmp = icmp eq i32 %sub, %conv1
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%conv3 = zext i1 %cmp to i8
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ret i8 %conv3
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}
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define signext i16 @eq3(i16 signext %x, i16 signext %y) {
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; CHECK-LABEL: eq3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: neg r3, r3
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; CHECK-NEXT: xor r3, r3, r4
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: blr
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%conv = sext i16 %x to i32
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%sub = sub nsw i32 0, %conv
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%conv1 = sext i16 %y to i32
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%cmp = icmp eq i32 %sub, %conv1
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%conv3 = zext i1 %cmp to i16
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ret i16 %conv3
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}
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define zeroext i16 @eq4(i16 zeroext %x, i16 zeroext %y) {
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; CHECK-LABEL: eq4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: neg r3, r3
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; CHECK-NEXT: xor r3, r3, r4
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: blr
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%conv = zext i16 %x to i32
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%sub = sub nsw i32 0, %conv
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%conv1 = zext i16 %y to i32
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%cmp = icmp eq i32 %sub, %conv1
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%conv3 = zext i1 %cmp to i16
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ret i16 %conv3
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}
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define signext i32 @eq5(i32 signext %x, i32 signext %y) {
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; CHECK-LABEL: eq5:
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; CHECK: # %bb.0:
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; CHECK-NEXT: neg r3, r3
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; CHECK-NEXT: xor r3, r3, r4
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: blr
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%sub = sub nsw i32 0, %x
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%cmp = icmp eq i32 %sub, %y
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}
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define zeroext i32 @eq6(i32 zeroext %x, i32 zeroext %y) {
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; CHECK-LABEL: eq6:
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; CHECK: # %bb.0:
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; CHECK-NEXT: neg r3, r3
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; CHECK-NEXT: xor r3, r3, r4
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: blr
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%sub = sub i32 0, %x
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%cmp = icmp eq i32 %sub, %y
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}
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define i64 @eq7(i64 %x, i64 %y) {
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; CHECK-LABEL: eq7:
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; CHECK: # %bb.0:
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; CHECK-NEXT: neg r3, r3
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; CHECK-NEXT: xor r3, r3, r4
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; CHECK-NEXT: cntlzd r3, r3
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; CHECK-NEXT: rldicl r3, r3, 58, 63
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; CHECK-NEXT: blr
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%sub = sub nsw i64 0, %x
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%cmp = icmp eq i64 %sub, %y
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%zext = zext i1 %cmp to i64
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ret i64 %zext
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}
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define zeroext i1 @eq8(i1 zeroext %x, i1 zeroext %y) {
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; CHECK-LABEL: eq8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: neg r3, r3
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; CHECK-NEXT: xor r3, r4, r3
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: blr
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%conv = zext i1 %y to i32
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%sub = sext i1 %x to i32
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%cmp = icmp eq i32 %conv, %sub
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ret i1 %cmp
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}
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define zeroext i8 @eq9(i8 zeroext %x, i8 zeroext %y) {
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; CHECK-LABEL: eq9:
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; CHECK: # %bb.0:
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; CHECK-NEXT: neg r4, r4
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; CHECK-NEXT: xor r3, r3, r4
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: blr
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%conv = zext i8 %x to i32
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%conv1 = zext i8 %y to i32
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%sub = sub nsw i32 0, %conv1
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%cmp = icmp eq i32 %conv, %sub
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%conv3 = zext i1 %cmp to i8
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ret i8 %conv3
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}
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define signext i16 @eq10(i16 signext %x, i16 signext %y) {
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; CHECK-LABEL: eq10:
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; CHECK: # %bb.0:
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; CHECK-NEXT: neg r4, r4
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; CHECK-NEXT: xor r3, r3, r4
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: blr
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%conv = sext i16 %x to i32
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%conv1 = sext i16 %y to i32
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%sub = sub nsw i32 0, %conv1
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%cmp = icmp eq i32 %conv, %sub
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%conv3 = zext i1 %cmp to i16
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ret i16 %conv3
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}
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define zeroext i16 @eq11(i16 zeroext %x, i16 zeroext %y) {
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; CHECK-LABEL: eq11:
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; CHECK: # %bb.0:
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; CHECK-NEXT: neg r4, r4
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; CHECK-NEXT: xor r3, r3, r4
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: blr
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%conv = zext i16 %x to i32
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%conv1 = zext i16 %y to i32
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%sub = sub nsw i32 0, %conv1
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%cmp = icmp eq i32 %conv, %sub
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%conv3 = zext i1 %cmp to i16
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ret i16 %conv3
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}
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define signext i32 @eq12(i32 signext %x, i32 signext %y) {
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; CHECK-LABEL: eq12:
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; CHECK: # %bb.0:
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; CHECK-NEXT: neg r4, r4
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; CHECK-NEXT: xor r3, r4, r3
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: blr
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%sub = sub nsw i32 0, %y
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%cmp = icmp eq i32 %sub, %x
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}
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define zeroext i32 @eq13(i32 zeroext %x, i32 zeroext %y) {
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; CHECK-LABEL: eq13:
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; CHECK: # %bb.0:
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; CHECK-NEXT: neg r4, r4
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; CHECK-NEXT: xor r3, r4, r3
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: blr
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%sub = sub i32 0, %y
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%cmp = icmp eq i32 %sub, %x
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}
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define i64 @eq14(i64 %x, i64 %y) {
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; CHECK-LABEL: eq14:
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; CHECK: # %bb.0:
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; CHECK-NEXT: neg r4, r4
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; CHECK-NEXT: xor r3, r4, r3
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; CHECK-NEXT: cntlzd r3, r3
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; CHECK-NEXT: rldicl r3, r3, 58, 63
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; CHECK-NEXT: blr
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%sub = sub nsw i64 0, %y
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%cmp = icmp eq i64 %sub, %x
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%conv1 = zext i1 %cmp to i64
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ret i64 %conv1
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}
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define zeroext i1 @neq1(i1 zeroext %x, i1 zeroext %y) {
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; CHECK-LABEL: neq1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: neg r3, r3
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; CHECK-NEXT: xor r3, r3, r4
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: xori r3, r3, 1
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; CHECK-NEXT: blr
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%sub = sext i1 %x to i32
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%conv3 = zext i1 %y to i32
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%cmp = icmp ne i32 %sub, %conv3
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ret i1 %cmp
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}
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define zeroext i8 @neq2(i8 zeroext %x, i8 zeroext %y) {
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; CHECK-LABEL: neq2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: neg r3, r3
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; CHECK-NEXT: xor r3, r3, r4
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: xori r3, r3, 1
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; CHECK-NEXT: blr
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%conv = zext i8 %x to i32
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%sub = sub nsw i32 0, %conv
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%conv1 = zext i8 %y to i32
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%cmp = icmp ne i32 %sub, %conv1
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%conv3 = zext i1 %cmp to i8
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ret i8 %conv3
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}
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define signext i16 @neq3(i16 signext %x, i16 signext %y) {
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; CHECK-LABEL: neq3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: neg r3, r3
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; CHECK-NEXT: xor r3, r3, r4
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: xori r3, r3, 1
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; CHECK-NEXT: blr
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%conv = sext i16 %x to i32
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%sub = sub nsw i32 0, %conv
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%conv1 = sext i16 %y to i32
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%cmp = icmp ne i32 %sub, %conv1
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%conv3 = zext i1 %cmp to i16
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ret i16 %conv3
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}
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define zeroext i16 @neq4(i16 zeroext %x, i16 zeroext %y) {
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; CHECK-LABEL: neq4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: neg r3, r3
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; CHECK-NEXT: xor r3, r3, r4
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: xori r3, r3, 1
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; CHECK-NEXT: blr
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%conv = zext i16 %x to i32
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%sub = sub nsw i32 0, %conv
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%conv1 = zext i16 %y to i32
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%cmp = icmp ne i32 %sub, %conv1
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%conv3 = zext i1 %cmp to i16
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ret i16 %conv3
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}
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define signext i32 @neq5(i32 signext %x, i32 signext %y) {
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; CHECK-LABEL: neq5:
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; CHECK: # %bb.0:
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; CHECK-NEXT: neg r3, r3
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; CHECK-NEXT: xor r3, r3, r4
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: xori r3, r3, 1
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; CHECK-NEXT: blr
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%sub = sub nsw i32 0, %x
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%cmp = icmp ne i32 %sub, %y
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}
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define zeroext i32 @neq6(i32 zeroext %x, i32 zeroext %y) {
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; CHECK-LABEL: neq6:
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; CHECK: # %bb.0:
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; CHECK-NEXT: neg r3, r3
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; CHECK-NEXT: xor r3, r3, r4
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: xori r3, r3, 1
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; CHECK-NEXT: blr
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%sub = sub i32 0, %x
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%cmp = icmp ne i32 %sub, %y
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}
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define i64 @neq7(i64 %x, i64 %y) {
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; CHECK-LABEL: neq7:
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; CHECK: # %bb.0:
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; CHECK-NEXT: neg r3, r3
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; CHECK-NEXT: xor r3, r3, r4
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; CHECK-NEXT: addic r4, r3, -1
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; CHECK-NEXT: subfe r3, r4, r3
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; CHECK-NEXT: blr
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%sub = sub nsw i64 0, %x
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%cmp = icmp ne i64 %sub, %y
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%zext = zext i1 %cmp to i64
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ret i64 %zext
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}
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define zeroext i1 @neq8(i1 zeroext %x, i1 zeroext %y) {
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; CHECK-LABEL: neq8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: neg r3, r3
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; CHECK-NEXT: xor r3, r4, r3
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: xori r3, r3, 1
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; CHECK-NEXT: blr
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%conv = zext i1 %y to i32
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%sub = sext i1 %x to i32
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%cmp = icmp ne i32 %conv, %sub
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ret i1 %cmp
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}
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define zeroext i8 @neq9(i8 zeroext %x, i8 zeroext %y) {
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; CHECK-LABEL: neq9:
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; CHECK: # %bb.0:
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; CHECK-NEXT: neg r3, r3
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; CHECK-NEXT: xor r3, r4, r3
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: xori r3, r3, 1
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; CHECK-NEXT: blr
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%conv = zext i8 %y to i32
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%conv1 = zext i8 %x to i32
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%sub = sub nsw i32 0, %conv1
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%cmp = icmp ne i32 %conv, %sub
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%conv3 = zext i1 %cmp to i8
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ret i8 %conv3
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}
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define signext i16 @neq10(i16 signext %x, i16 signext %y) {
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; CHECK-LABEL: neq10:
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; CHECK: # %bb.0:
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; CHECK-NEXT: neg r3, r3
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; CHECK-NEXT: xor r3, r4, r3
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: xori r3, r3, 1
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; CHECK-NEXT: blr
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%conv = sext i16 %y to i32
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%conv1 = sext i16 %x to i32
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%sub = sub nsw i32 0, %conv1
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%cmp = icmp ne i32 %conv, %sub
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%conv3 = zext i1 %cmp to i16
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ret i16 %conv3
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}
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define zeroext i16 @neq11(i16 zeroext %x, i16 zeroext %y) {
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; CHECK-LABEL: neq11:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: neg r3, r3
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; CHECK-NEXT: xor r3, r4, r3
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: xori r3, r3, 1
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; CHECK-NEXT: blr
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entry:
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%conv = zext i16 %y to i32
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%conv1 = zext i16 %x to i32
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%sub = sub nsw i32 0, %conv1
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%cmp = icmp ne i32 %conv, %sub
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%conv3 = zext i1 %cmp to i16
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ret i16 %conv3
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}
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define signext i32 @neq12(i32 signext %x, i32 signext %y) {
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; CHECK-LABEL: neq12:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: neg r3, r3
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; CHECK-NEXT: xor r3, r3, r4
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: xori r3, r3, 1
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; CHECK-NEXT: blr
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entry:
|
||||
%sub = sub nsw i32 0, %x
|
||||
%cmp = icmp ne i32 %sub, %y
|
||||
%conv = zext i1 %cmp to i32
|
||||
ret i32 %conv
|
||||
}
|
||||
|
||||
define zeroext i32 @neq13(i32 zeroext %x, i32 zeroext %y) {
|
||||
; CHECK-LABEL: neq13:
|
||||
; CHECK: # %bb.0: # %entry
|
||||
; CHECK-NEXT: neg r3, r3
|
||||
; CHECK-NEXT: xor r3, r3, r4
|
||||
; CHECK-NEXT: cntlzw r3, r3
|
||||
; CHECK-NEXT: srwi r3, r3, 5
|
||||
; CHECK-NEXT: xori r3, r3, 1
|
||||
; CHECK-NEXT: blr
|
||||
entry:
|
||||
%sub = sub i32 0, %x
|
||||
%cmp = icmp ne i32 %sub, %y
|
||||
%conv = zext i1 %cmp to i32
|
||||
ret i32 %conv
|
||||
}
|
||||
|
||||
define i64 @neq14(i64 %x, i64 %y) {
|
||||
; CHECK-LABEL: neq14:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: neg r3, r3
|
||||
; CHECK-NEXT: xor r3, r4, r3
|
||||
; CHECK-NEXT: addic r4, r3, -1
|
||||
; CHECK-NEXT: subfe r3, r4, r3
|
||||
; CHECK-NEXT: blr
|
||||
%sub = sub nsw i64 0, %x
|
||||
%cmp = icmp ne i64 %y, %sub
|
||||
%zext = zext i1 %cmp to i64
|
||||
ret i64 %zext
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user