RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 19:52:54 +01:00
Code Issues Projects Releases Wiki Activity

Minor cleanups to reduce some spurious differences between different

Browse Source 
scheduler implementations.

llvm-svn: 41191
This commit is contained in:
Dan Gohman 2007-08-20 19:28:38 +00:00
parent 908f4e65ed
commit 23db01efea
1 changed files with 11 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
View File

@ -45,7 +45,6 @@ namespace {
/// ScheduleDAGRRList - The actual register reduction list scheduler
/// implementation. This supports both top-down and bottom-up scheduling.
///
class VISIBILITY_HIDDEN ScheduleDAGRRList : public ScheduleDAG {
private:
/// isBottomUp - This is true if the scheduling problem is bottom-up, false if
@ -169,7 +168,7 @@ void ScheduleDAGRRList::CommuteNodesToReducePressure() {
//===----------------------------------------------------------------------===//
/// ReleasePred - Decrement the NumSuccsLeft count of a predecessor. Add it to
/// the Available queue is the count reaches zero. Also update its cycle bound.
/// the AvailableQueue if the count reaches zero. Also update its cycle bound.
void ScheduleDAGRRList::ReleasePred(SUnit *PredSU, bool isChain,
unsigned CurCycle) {
// FIXME: the distance between two nodes is not always == the predecessor's
@ -282,7 +281,7 @@ void ScheduleDAGRRList::ListScheduleBottomUp() {
//===----------------------------------------------------------------------===//
/// ReleaseSucc - Decrement the NumPredsLeft count of a successor. Add it to
/// the PendingQueue if the count reaches zero.
/// the AvailableQueue if the count reaches zero. Also update its cycle bound.
void ScheduleDAGRRList::ReleaseSucc(SUnit *SuccSU, bool isChain,
unsigned CurCycle) {
// FIXME: the distance between two nodes is not always == the predecessor's
@ -330,6 +329,8 @@ void ScheduleDAGRRList::ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle) {
SU->isScheduled = true;
}
/// ListScheduleTopDown - The main loop of list scheduling for top-down
/// schedulers.
void ScheduleDAGRRList::ListScheduleTopDown() {
unsigned CurCycle = 0;
SUnit *Entry = SUnitMap[DAG.getEntryNode().Val];
@ -474,7 +475,7 @@ namespace {
const TargetInstrInfo *TII;
public:
BURegReductionPriorityQueue(const TargetInstrInfo *tii)
explicit BURegReductionPriorityQueue(const TargetInstrInfo *tii)
: TII(tii) {}
void initNodes(DenseMap<SDNode*, SUnit*> &sumap,
@ -539,7 +540,8 @@ namespace {
template<class SF>
class TDRegReductionPriorityQueue : public RegReductionPriorityQueue<SF> {
class VISIBILITY_HIDDEN TDRegReductionPriorityQueue
: public RegReductionPriorityQueue<SF> {
// SUnitMap SDNode to SUnit mapping (n -> 1).
DenseMap<SDNode*, SUnit*> *SUnitMap;