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[AArch64] Add some missing Neoverse features

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This enables AES fusion and the post RA scheduler for the Neoverse cores.
And while we are it also for the A55 that we had missed earlier.

Differential Revision: https://reviews.llvm.org/D96866
This commit is contained in:
Sjoerd Meijer 2021-02-18 14:26:09 +00:00
parent 41dafb0875
commit 23fb2ffcc6
2 changed files with 21 additions and 3 deletions
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20
lib/Target/AArch64/AArch64.td
View File

@ -594,7 +594,9 @@ def ProcA55 : SubtargetFeature<"a55", "ARMProcFamily", "CortexA55",
FeatureFullFP16,
FeatureDotProd,
FeatureRCPC,
FeaturePerfMon
FeaturePerfMon,
FeaturePostRAScheduler,
FeatureUseAA
]>;
def ProcA57 : SubtargetFeature<"a57", "ARMProcFamily", "CortexA57",
@ -728,7 +730,7 @@ def ProcR82 : SubtargetFeature<"cortex-r82", "ARMProcFamily",
"CortexR82",
"Cortex-R82 ARM Processors", [
FeaturePostRAScheduler,
// TODO: crypto and FuseAES
FeatureUseAA,
// All other features are implied by v8_0r ops:
HasV8_0rOps,
]>;
@ -977,6 +979,9 @@ def ProcNeoverseE1 : SubtargetFeature<"neoversee1", "ARMProcFamily",
FeatureNEON,
FeatureRCPC,
FeatureSSBS,
FeaturePostRAScheduler,
FeatureUseAA,
FeatureFuseAES,
]>;
def ProcNeoverseN1 : SubtargetFeature<"neoversen1", "ARMProcFamily",
@ -991,6 +996,9 @@ def ProcNeoverseN1 : SubtargetFeature<"neoversen1", "ARMProcFamily",
FeatureRCPC,
FeatureSPE,
FeatureSSBS,
FeaturePostRAScheduler,
FeatureUseAA,
FeatureFuseAES,
]>;
def ProcNeoverseN2 : SubtargetFeature<"neoversen2", "ARMProcFamily",
@ -1003,7 +1011,12 @@ def ProcNeoverseN2 : SubtargetFeature<"neoversen2", "ARMProcFamily",
FeatureMTE,
FeatureSVE2,
FeatureSVE2BitPerm,
FeatureTRBE]>;
FeatureTRBE,
FeaturePostRAScheduler,
FeatureUseAA,
FeatureCrypto,
FeatureFuseAES,
]>;
def ProcNeoverseV1 : SubtargetFeature<"neoversev1", "ARMProcFamily",
"NeoverseV1",
@ -1020,6 +1033,7 @@ def ProcNeoverseV1 : SubtargetFeature<"neoversev1", "ARMProcFamily",
FeatureNEON,
FeaturePerfMon,
FeaturePostRAScheduler,
FeatureUseAA,
FeatureRandGen,
FeatureSPE,
FeatureSSBS,

4
test/CodeGen/AArch64/misched-fusion-aes.ll
View File

@ -10,6 +10,10 @@
; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=cortex-a78 | FileCheck %s
; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=cortex-a78c| FileCheck %s
; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=cortex-x1 | FileCheck %s
; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=neoverse-e1 | FileCheck %s
; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=neoverse-n1 | FileCheck %s
; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=neoverse-n2 | FileCheck %s
; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=neoverse-v1 | FileCheck %s
; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=exynos-m3 | FileCheck %s
; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=exynos-m4 | FileCheck %s
; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=exynos-m5 | FileCheck %s