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AMDGPU/GlobalISel: Select G_LSHR
llvm-svn: 366256
This commit is contained in:
Matt Arsenault
parent
0b78be2ffc
commit
241c4c6f33
@ -517,10 +517,10 @@ def S_LSHL_B64 : SOP2_64_32 <"s_lshl_b64",
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[(set SReg_64:$sdst, (shl (i64 SSrc_b64:$src0), (i32 SSrc_b32:$src1)))]
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>;
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def S_LSHR_B32 : SOP2_32 <"s_lshr_b32",
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[(set i32:$sdst, (UniformBinFrag<srl> i32:$src0, i32:$src1))]
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[(set SReg_32:$sdst, (srl (i32 SSrc_b32:$src0), (i32 SSrc_b32:$src1)))]
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>;
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def S_LSHR_B64 : SOP2_64_32 <"s_lshr_b64",
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[(set i64:$sdst, (UniformBinFrag<srl> i64:$src0, i32:$src1))]
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[(set SReg_64:$sdst, (srl (i64 SSrc_b64:$src0), (i32 SSrc_b32:$src1)))]
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>;
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def S_ASHR_I32 : SOP2_32 <"s_ashr_i32",
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[(set i32:$sdst, (UniformBinFrag<sra> i32:$src0, i32:$src1))]
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@ -472,7 +472,7 @@ defm V_MIN_I32 : VOP2Inst <"v_min_i32", VOP_PAT_GEN<VOP_I32_I32_I32>, smin>;
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defm V_MAX_I32 : VOP2Inst <"v_max_i32", VOP_PAT_GEN<VOP_I32_I32_I32>, smax>;
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defm V_MIN_U32 : VOP2Inst <"v_min_u32", VOP_PAT_GEN<VOP_I32_I32_I32>, umin>;
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defm V_MAX_U32 : VOP2Inst <"v_max_u32", VOP_PAT_GEN<VOP_I32_I32_I32>, umax>;
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defm V_LSHRREV_B32 : VOP2Inst <"v_lshrrev_b32", VOP_I32_I32_I32, null_frag, "v_lshr_b32">;
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defm V_LSHRREV_B32 : VOP2Inst <"v_lshrrev_b32", VOP_I32_I32_I32, lshr_rev, "v_lshr_b32">;
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defm V_ASHRREV_I32 : VOP2Inst <"v_ashrrev_i32", VOP_I32_I32_I32, null_frag, "v_ashr_i32">;
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defm V_LSHLREV_B32 : VOP2Inst <"v_lshlrev_b32", VOP_I32_I32_I32, lshl_rev, "v_lshl_b32">;
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defm V_AND_B32 : VOP2Inst <"v_and_b32", VOP_PAT_GEN<VOP_I32_I32_I32>, and>;
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@ -394,7 +394,7 @@ def V_MULLIT_F32 : VOP3Inst <"v_mullit_f32", VOP3_Profile<VOP_F32_F32_F32_F32>>;
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let SubtargetPredicate = isGFX8Plus in {
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def V_LSHLREV_B64 : VOP3Inst <"v_lshlrev_b64", VOP3_Profile<VOP_I64_I32_I64>, lshl_rev>;
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def V_LSHRREV_B64 : VOP3Inst <"v_lshrrev_b64", VOP3_Profile<VOP_I64_I32_I64>>;
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def V_LSHRREV_B64 : VOP3Inst <"v_lshrrev_b64", VOP3_Profile<VOP_I64_I32_I64>, lshr_rev>;
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def V_ASHRREV_I64 : VOP3Inst <"v_ashrrev_i64", VOP3_Profile<VOP_I64_I32_I64>>;
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} // End SubtargetPredicate = isGFX8Plus
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} // End SchedRW = [Write64Bit]
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327
test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir
Normal file
327
test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir
Normal file
@ -0,0 +1,327 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX6 %s
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# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX7 %s
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX8 %s
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# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX9 %s
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# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX10 %s
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---
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name: lshr_s32_ss
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0, $sgpr1
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; GFX6-LABEL: name: lshr_s32_ss
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; GFX6: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX6: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; GFX6: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], [[COPY1]], implicit-def $scc
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; GFX6: S_ENDPGM 0, implicit [[S_LSHR_B32_]]
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; GFX7-LABEL: name: lshr_s32_ss
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; GFX7: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX7: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; GFX7: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], [[COPY1]], implicit-def $scc
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; GFX7: S_ENDPGM 0, implicit [[S_LSHR_B32_]]
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; GFX8-LABEL: name: lshr_s32_ss
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; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; GFX8: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], [[COPY1]], implicit-def $scc
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; GFX8: S_ENDPGM 0, implicit [[S_LSHR_B32_]]
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; GFX9-LABEL: name: lshr_s32_ss
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; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; GFX9: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], [[COPY1]], implicit-def $scc
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; GFX9: S_ENDPGM 0, implicit [[S_LSHR_B32_]]
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; GFX10-LABEL: name: lshr_s32_ss
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; GFX10: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], [[COPY1]], implicit-def $scc
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; GFX10: S_ENDPGM 0, implicit [[S_LSHR_B32_]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = COPY $sgpr1
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%2:sgpr(s32) = G_LSHR %0, %1
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S_ENDPGM 0, implicit %2
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...
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---
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name: lshr_s32_sv
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0, $vgpr0
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; GFX6-LABEL: name: lshr_s32_sv
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; GFX6: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
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; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX6: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX6: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
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; GFX7-LABEL: name: lshr_s32_sv
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; GFX7: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
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; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX7: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX7: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
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; GFX8-LABEL: name: lshr_s32_sv
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; GFX8: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
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; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX8: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX8: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
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; GFX9-LABEL: name: lshr_s32_sv
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; GFX9: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
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; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX9: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX9: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
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; GFX10-LABEL: name: lshr_s32_sv
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
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; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX10: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX10: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:vgpr(s32) = COPY $vgpr0
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%2:vgpr(s32) = G_LSHR %0, %1
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S_ENDPGM 0, implicit %2
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...
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---
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name: lshr_s32_vs
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0, $vgpr0
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; GFX6-LABEL: name: lshr_s32_vs
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; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX6: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
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; GFX6: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX6: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
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; GFX7-LABEL: name: lshr_s32_vs
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; GFX7: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX7: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
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; GFX7: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX7: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
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; GFX8-LABEL: name: lshr_s32_vs
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; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX8: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
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; GFX8: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX8: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
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; GFX9-LABEL: name: lshr_s32_vs
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; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX9: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
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; GFX9: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX9: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
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; GFX10-LABEL: name: lshr_s32_vs
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX10: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
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; GFX10: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX10: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:sgpr(s32) = COPY $sgpr0
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%2:vgpr(s32) = G_LSHR %0, %1
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S_ENDPGM 0, implicit %2
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...
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---
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name: lshr_s32_vv
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; GFX6-LABEL: name: lshr_s32_vv
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; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX6: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX6: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
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; GFX7-LABEL: name: lshr_s32_vv
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; GFX7: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX7: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX7: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
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; GFX8-LABEL: name: lshr_s32_vv
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; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX8: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX8: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
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; GFX9-LABEL: name: lshr_s32_vv
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; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX9: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX9: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
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; GFX10-LABEL: name: lshr_s32_vv
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX10: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX10: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr1
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%2:vgpr(s32) = G_LSHR %0, %1
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S_ENDPGM 0, implicit %2
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...
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---
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name: lshr_s64_ss
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1, $sgpr2
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; GFX6-LABEL: name: lshr_s64_ss
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; GFX6: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
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; GFX6: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
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; GFX6: [[S_LSHR_B64_:%[0-9]+]]:sreg_64 = S_LSHR_B64 [[COPY]], [[COPY1]], implicit-def $scc
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; GFX6: S_ENDPGM 0, implicit [[S_LSHR_B64_]]
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; GFX7-LABEL: name: lshr_s64_ss
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; GFX7: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
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; GFX7: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
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; GFX7: [[S_LSHR_B64_:%[0-9]+]]:sreg_64 = S_LSHR_B64 [[COPY]], [[COPY1]], implicit-def $scc
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; GFX7: S_ENDPGM 0, implicit [[S_LSHR_B64_]]
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; GFX8-LABEL: name: lshr_s64_ss
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; GFX8: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
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; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
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; GFX8: [[S_LSHR_B64_:%[0-9]+]]:sreg_64 = S_LSHR_B64 [[COPY]], [[COPY1]], implicit-def $scc
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; GFX8: S_ENDPGM 0, implicit [[S_LSHR_B64_]]
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; GFX9-LABEL: name: lshr_s64_ss
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; GFX9: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
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; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
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; GFX9: [[S_LSHR_B64_:%[0-9]+]]:sreg_64 = S_LSHR_B64 [[COPY]], [[COPY1]], implicit-def $scc
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; GFX9: S_ENDPGM 0, implicit [[S_LSHR_B64_]]
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; GFX10-LABEL: name: lshr_s64_ss
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
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; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
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; GFX10: [[S_LSHR_B64_:%[0-9]+]]:sreg_64 = S_LSHR_B64 [[COPY]], [[COPY1]], implicit-def $scc
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; GFX10: S_ENDPGM 0, implicit [[S_LSHR_B64_]]
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%0:sgpr(s64) = COPY $sgpr0_sgpr1
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%1:sgpr(s32) = COPY $sgpr2
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%2:sgpr(s64) = G_LSHR %0, %1
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S_ENDPGM 0, implicit %2
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...
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---
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name: lshr_s64_sv
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1, $vgpr0
|
||||
; GFX6-LABEL: name: lshr_s64_sv
|
||||
; GFX6: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
|
||||
; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
||||
; GFX6: [[V_LSHRREV_B64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64 [[COPY1]], [[COPY]], implicit $exec
|
||||
; GFX6: S_ENDPGM 0, implicit [[V_LSHRREV_B64_]]
|
||||
; GFX7-LABEL: name: lshr_s64_sv
|
||||
; GFX7: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
|
||||
; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
||||
; GFX7: [[V_LSHRREV_B64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64 [[COPY1]], [[COPY]], implicit $exec
|
||||
; GFX7: S_ENDPGM 0, implicit [[V_LSHRREV_B64_]]
|
||||
; GFX8-LABEL: name: lshr_s64_sv
|
||||
; GFX8: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
|
||||
; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
||||
; GFX8: [[V_LSHRREV_B64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64 [[COPY1]], [[COPY]], implicit $exec
|
||||
; GFX8: S_ENDPGM 0, implicit [[V_LSHRREV_B64_]]
|
||||
; GFX9-LABEL: name: lshr_s64_sv
|
||||
; GFX9: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
|
||||
; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
||||
; GFX9: [[V_LSHRREV_B64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64 [[COPY1]], [[COPY]], implicit $exec
|
||||
; GFX9: S_ENDPGM 0, implicit [[V_LSHRREV_B64_]]
|
||||
; GFX10-LABEL: name: lshr_s64_sv
|
||||
; GFX10: $vcc_hi = IMPLICIT_DEF
|
||||
; GFX10: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
|
||||
; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
||||
; GFX10: [[V_LSHRREV_B64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64 [[COPY1]], [[COPY]], implicit $exec
|
||||
; GFX10: S_ENDPGM 0, implicit [[V_LSHRREV_B64_]]
|
||||
%0:sgpr(s64) = COPY $sgpr0_sgpr1
|
||||
%1:vgpr(s32) = COPY $vgpr0
|
||||
%2:vgpr(s64) = G_LSHR %0, %1
|
||||
S_ENDPGM 0, implicit %2
|
||||
...
|
||||
|
||||
---
|
||||
name: lshr_s64_vs
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $sgpr0, $vgpr0_vgpr1
|
||||
; GFX6-LABEL: name: lshr_s64_vs
|
||||
; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX6: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
|
||||
; GFX6: [[V_LSHRREV_B64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64 [[COPY1]], [[COPY]], implicit $exec
|
||||
; GFX6: S_ENDPGM 0, implicit [[V_LSHRREV_B64_]]
|
||||
; GFX7-LABEL: name: lshr_s64_vs
|
||||
; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX7: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
|
||||
; GFX7: [[V_LSHRREV_B64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64 [[COPY1]], [[COPY]], implicit $exec
|
||||
; GFX7: S_ENDPGM 0, implicit [[V_LSHRREV_B64_]]
|
||||
; GFX8-LABEL: name: lshr_s64_vs
|
||||
; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX8: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
|
||||
; GFX8: [[V_LSHRREV_B64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64 [[COPY1]], [[COPY]], implicit $exec
|
||||
; GFX8: S_ENDPGM 0, implicit [[V_LSHRREV_B64_]]
|
||||
; GFX9-LABEL: name: lshr_s64_vs
|
||||
; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX9: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
|
||||
; GFX9: [[V_LSHRREV_B64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64 [[COPY1]], [[COPY]], implicit $exec
|
||||
; GFX9: S_ENDPGM 0, implicit [[V_LSHRREV_B64_]]
|
||||
; GFX10-LABEL: name: lshr_s64_vs
|
||||
; GFX10: $vcc_hi = IMPLICIT_DEF
|
||||
; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX10: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
|
||||
; GFX10: [[V_LSHRREV_B64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64 [[COPY1]], [[COPY]], implicit $exec
|
||||
; GFX10: S_ENDPGM 0, implicit [[V_LSHRREV_B64_]]
|
||||
%0:vgpr(s64) = COPY $vgpr0_vgpr1
|
||||
%1:sgpr(s32) = COPY $sgpr0
|
||||
%2:vgpr(s64) = G_LSHR %0, %1
|
||||
S_ENDPGM 0, implicit %2
|
||||
...
|
||||
|
||||
---
|
||||
name: lshr_s64_vv
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0_vgpr1, $vgpr2
|
||||
; GFX6-LABEL: name: lshr_s64_vv
|
||||
; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
|
||||
; GFX6: [[V_LSHRREV_B64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64 [[COPY1]], [[COPY]], implicit $exec
|
||||
; GFX6: S_ENDPGM 0, implicit [[V_LSHRREV_B64_]]
|
||||
; GFX7-LABEL: name: lshr_s64_vv
|
||||
; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
|
||||
; GFX7: [[V_LSHRREV_B64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64 [[COPY1]], [[COPY]], implicit $exec
|
||||
; GFX7: S_ENDPGM 0, implicit [[V_LSHRREV_B64_]]
|
||||
; GFX8-LABEL: name: lshr_s64_vv
|
||||
; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
|
||||
; GFX8: [[V_LSHRREV_B64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64 [[COPY1]], [[COPY]], implicit $exec
|
||||
; GFX8: S_ENDPGM 0, implicit [[V_LSHRREV_B64_]]
|
||||
; GFX9-LABEL: name: lshr_s64_vv
|
||||
; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
|
||||
; GFX9: [[V_LSHRREV_B64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64 [[COPY1]], [[COPY]], implicit $exec
|
||||
; GFX9: S_ENDPGM 0, implicit [[V_LSHRREV_B64_]]
|
||||
; GFX10-LABEL: name: lshr_s64_vv
|
||||
; GFX10: $vcc_hi = IMPLICIT_DEF
|
||||
; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
|
||||
; GFX10: [[V_LSHRREV_B64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64 [[COPY1]], [[COPY]], implicit $exec
|
||||
; GFX10: S_ENDPGM 0, implicit [[V_LSHRREV_B64_]]
|
||||
%0:vgpr(s64) = COPY $vgpr0_vgpr1
|
||||
%1:vgpr(s32) = COPY $vgpr2
|
||||
%2:vgpr(s64) = G_LSHR %0, %1
|
||||
S_ENDPGM 0, implicit %2
|
||||
...
|
||||
|
||||
203
test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.s16.mir
Normal file
203
test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.s16.mir
Normal file
@ -0,0 +1,203 @@
|
||||
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
||||
|
||||
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=GFX8 %s
|
||||
# RUN: FileCheck -check-prefixes=ERR-GFX8,ERR %s < %t
|
||||
|
||||
# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=GFX9 %s
|
||||
# RUN: FileCheck -check-prefixes=ERR-GFX910,ERR %s < %t
|
||||
|
||||
# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=GFX10 %s
|
||||
# RUN: FileCheck -check-prefixes=ERR-GFX910,ERR %s < %t
|
||||
|
||||
# ERR-NOT: remark
|
||||
# ERR-GFX8: remark: <unknown>:0:0: cannot select: %3:sgpr(s16) = G_LSHR %2:sgpr, %1:sgpr(s32) (in function: lshr_s16_ss)
|
||||
# ERR-GFX8-NEXT: remark: <unknown>:0:0: cannot select: %3:vgpr(s16) = G_LSHR %2:sgpr, %1:vgpr(s32) (in function: lshr_s16_sv)
|
||||
# ERR-GFX8-NEXT: remark: <unknown>:0:0: cannot select: %3:vgpr(s16) = G_LSHR %2:vgpr, %1:sgpr(s32) (in function: lshr_s16_vs)
|
||||
# ERR-GFX8-NEXT: remark: <unknown>:0:0: cannot select: %3:vgpr(s16) = G_LSHR %2:vgpr, %1:vgpr(s32) (in function: lshr_s16_vv)
|
||||
|
||||
# ERR-GFX910: remark: <unknown>:0:0: cannot select: %3:sgpr(s16) = G_LSHR %2:sgpr, %1:sgpr(s32) (in function: lshr_s16_ss)
|
||||
# ERR-GFX910-NEXT: remark: <unknown>:0:0: cannot select: %3:vgpr(s16) = G_LSHR %2:sgpr, %1:vgpr(s32) (in function: lshr_s16_sv)
|
||||
# ERR-GFX910-NEXT: remark: <unknown>:0:0: cannot select: %3:vgpr(s16) = G_LSHR %2:vgpr, %1:sgpr(s32) (in function: lshr_s16_vs)
|
||||
# ERR-GFX910-NEXT: remark: <unknown>:0:0: cannot select: %3:vgpr(s16) = G_LSHR %2:vgpr, %1:vgpr(s32) (in function: lshr_s16_vv)
|
||||
|
||||
# ERR-NOT: remark
|
||||
|
||||
---
|
||||
name: lshr_s16_ss
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $sgpr0, $sgpr1
|
||||
; GFX6-LABEL: name: lshr_s16_ss
|
||||
; GFX6: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; GFX6: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
|
||||
; GFX6: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
|
||||
; GFX6: [[LSHR:%[0-9]+]]:sgpr(s16) = G_LSHR [[TRUNC]], [[COPY1]](s32)
|
||||
; GFX6: S_ENDPGM 0, implicit [[LSHR]](s16)
|
||||
; GFX7-LABEL: name: lshr_s16_ss
|
||||
; GFX7: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; GFX7: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
|
||||
; GFX7: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
|
||||
; GFX7: [[LSHR:%[0-9]+]]:sgpr(s16) = G_LSHR [[TRUNC]], [[COPY1]](s32)
|
||||
; GFX7: S_ENDPGM 0, implicit [[LSHR]](s16)
|
||||
; GFX8-LABEL: name: lshr_s16_ss
|
||||
; GFX8: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; GFX8: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
|
||||
; GFX8: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
|
||||
; GFX8: [[LSHR:%[0-9]+]]:sgpr(s16) = G_LSHR [[TRUNC]], [[COPY1]](s32)
|
||||
; GFX8: S_ENDPGM 0, implicit [[LSHR]](s16)
|
||||
; GFX9-LABEL: name: lshr_s16_ss
|
||||
; GFX9: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; GFX9: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
|
||||
; GFX9: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
|
||||
; GFX9: [[LSHR:%[0-9]+]]:sgpr(s16) = G_LSHR [[TRUNC]], [[COPY1]](s32)
|
||||
; GFX9: S_ENDPGM 0, implicit [[LSHR]](s16)
|
||||
; GFX10-LABEL: name: lshr_s16_ss
|
||||
; GFX10: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; GFX10: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
|
||||
; GFX10: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
|
||||
; GFX10: [[LSHR:%[0-9]+]]:sgpr(s16) = G_LSHR [[TRUNC]], [[COPY1]](s32)
|
||||
; GFX10: S_ENDPGM 0, implicit [[LSHR]](s16)
|
||||
%0:sgpr(s32) = COPY $sgpr0
|
||||
%1:sgpr(s32) = COPY $sgpr1
|
||||
%2:sgpr(s16) = G_TRUNC %0
|
||||
%3:sgpr(s16) = G_LSHR %2, %1
|
||||
S_ENDPGM 0, implicit %3
|
||||
...
|
||||
|
||||
---
|
||||
name: lshr_s16_sv
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $sgpr0, $vgpr0
|
||||
; GFX6-LABEL: name: lshr_s16_sv
|
||||
; GFX6: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; GFX6: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; GFX6: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
|
||||
; GFX6: [[LSHR:%[0-9]+]]:vgpr(s16) = G_LSHR [[TRUNC]], [[COPY1]](s32)
|
||||
; GFX6: S_ENDPGM 0, implicit [[LSHR]](s16)
|
||||
; GFX7-LABEL: name: lshr_s16_sv
|
||||
; GFX7: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; GFX7: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; GFX7: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
|
||||
; GFX7: [[LSHR:%[0-9]+]]:vgpr(s16) = G_LSHR [[TRUNC]], [[COPY1]](s32)
|
||||
; GFX7: S_ENDPGM 0, implicit [[LSHR]](s16)
|
||||
; GFX8-LABEL: name: lshr_s16_sv
|
||||
; GFX8: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; GFX8: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; GFX8: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
|
||||
; GFX8: [[LSHR:%[0-9]+]]:vgpr(s16) = G_LSHR [[TRUNC]], [[COPY1]](s32)
|
||||
; GFX8: S_ENDPGM 0, implicit [[LSHR]](s16)
|
||||
; GFX9-LABEL: name: lshr_s16_sv
|
||||
; GFX9: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; GFX9: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; GFX9: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
|
||||
; GFX9: [[LSHR:%[0-9]+]]:vgpr(s16) = G_LSHR [[TRUNC]], [[COPY1]](s32)
|
||||
; GFX9: S_ENDPGM 0, implicit [[LSHR]](s16)
|
||||
; GFX10-LABEL: name: lshr_s16_sv
|
||||
; GFX10: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; GFX10: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; GFX10: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
|
||||
; GFX10: [[LSHR:%[0-9]+]]:vgpr(s16) = G_LSHR [[TRUNC]], [[COPY1]](s32)
|
||||
; GFX10: S_ENDPGM 0, implicit [[LSHR]](s16)
|
||||
%0:sgpr(s32) = COPY $sgpr0
|
||||
%1:vgpr(s32) = COPY $vgpr0
|
||||
%2:sgpr(s16) = G_TRUNC %0
|
||||
%3:vgpr(s16) = G_LSHR %2, %1
|
||||
S_ENDPGM 0, implicit %3
|
||||
...
|
||||
|
||||
---
|
||||
name: lshr_s16_vs
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $sgpr0, $vgpr0
|
||||
; GFX6-LABEL: name: lshr_s16_vs
|
||||
; GFX6: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; GFX6: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; GFX6: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
|
||||
; GFX6: [[LSHR:%[0-9]+]]:vgpr(s16) = G_LSHR [[TRUNC]], [[COPY1]](s32)
|
||||
; GFX6: S_ENDPGM 0, implicit [[LSHR]](s16)
|
||||
; GFX7-LABEL: name: lshr_s16_vs
|
||||
; GFX7: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; GFX7: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; GFX7: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
|
||||
; GFX7: [[LSHR:%[0-9]+]]:vgpr(s16) = G_LSHR [[TRUNC]], [[COPY1]](s32)
|
||||
; GFX7: S_ENDPGM 0, implicit [[LSHR]](s16)
|
||||
; GFX8-LABEL: name: lshr_s16_vs
|
||||
; GFX8: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; GFX8: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; GFX8: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
|
||||
; GFX8: [[LSHR:%[0-9]+]]:vgpr(s16) = G_LSHR [[TRUNC]], [[COPY1]](s32)
|
||||
; GFX8: S_ENDPGM 0, implicit [[LSHR]](s16)
|
||||
; GFX9-LABEL: name: lshr_s16_vs
|
||||
; GFX9: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; GFX9: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; GFX9: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
|
||||
; GFX9: [[LSHR:%[0-9]+]]:vgpr(s16) = G_LSHR [[TRUNC]], [[COPY1]](s32)
|
||||
; GFX9: S_ENDPGM 0, implicit [[LSHR]](s16)
|
||||
; GFX10-LABEL: name: lshr_s16_vs
|
||||
; GFX10: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; GFX10: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; GFX10: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
|
||||
; GFX10: [[LSHR:%[0-9]+]]:vgpr(s16) = G_LSHR [[TRUNC]], [[COPY1]](s32)
|
||||
; GFX10: S_ENDPGM 0, implicit [[LSHR]](s16)
|
||||
%0:vgpr(s32) = COPY $vgpr0
|
||||
%1:sgpr(s32) = COPY $sgpr0
|
||||
%2:vgpr(s16) = G_TRUNC %0
|
||||
%3:vgpr(s16) = G_LSHR %2, %1
|
||||
S_ENDPGM 0, implicit %3
|
||||
...
|
||||
|
||||
---
|
||||
name: lshr_s16_vv
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0, $vgpr1
|
||||
; GFX6-LABEL: name: lshr_s16_vv
|
||||
; GFX6: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; GFX6: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
|
||||
; GFX6: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
|
||||
; GFX6: [[LSHR:%[0-9]+]]:vgpr(s16) = G_LSHR [[TRUNC]], [[COPY1]](s32)
|
||||
; GFX6: S_ENDPGM 0, implicit [[LSHR]](s16)
|
||||
; GFX7-LABEL: name: lshr_s16_vv
|
||||
; GFX7: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; GFX7: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
|
||||
; GFX7: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
|
||||
; GFX7: [[LSHR:%[0-9]+]]:vgpr(s16) = G_LSHR [[TRUNC]], [[COPY1]](s32)
|
||||
; GFX7: S_ENDPGM 0, implicit [[LSHR]](s16)
|
||||
; GFX8-LABEL: name: lshr_s16_vv
|
||||
; GFX8: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; GFX8: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
|
||||
; GFX8: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
|
||||
; GFX8: [[LSHR:%[0-9]+]]:vgpr(s16) = G_LSHR [[TRUNC]], [[COPY1]](s32)
|
||||
; GFX8: S_ENDPGM 0, implicit [[LSHR]](s16)
|
||||
; GFX9-LABEL: name: lshr_s16_vv
|
||||
; GFX9: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; GFX9: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
|
||||
; GFX9: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
|
||||
; GFX9: [[LSHR:%[0-9]+]]:vgpr(s16) = G_LSHR [[TRUNC]], [[COPY1]](s32)
|
||||
; GFX9: S_ENDPGM 0, implicit [[LSHR]](s16)
|
||||
; GFX10-LABEL: name: lshr_s16_vv
|
||||
; GFX10: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; GFX10: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
|
||||
; GFX10: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
|
||||
; GFX10: [[LSHR:%[0-9]+]]:vgpr(s16) = G_LSHR [[TRUNC]], [[COPY1]](s32)
|
||||
; GFX10: S_ENDPGM 0, implicit [[LSHR]](s16)
|
||||
%0:vgpr(s32) = COPY $vgpr0
|
||||
%1:vgpr(s32) = COPY $vgpr1
|
||||
%2:vgpr(s16) = G_TRUNC %0
|
||||
%3:vgpr(s16) = G_LSHR %2, %1
|
||||
S_ENDPGM 0, implicit %3
|
||||
...
|
||||
169
test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.v2s16.mir
Normal file
169
test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.v2s16.mir
Normal file
@ -0,0 +1,169 @@
|
||||
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
||||
# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=GFX9 %s
|
||||
# RUN: FileCheck -check-prefixes=ERR-GFX910,ERR %s < %t
|
||||
|
||||
# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=GFX10 %s
|
||||
# RUN: FileCheck -check-prefixes=ERR-GFX910,ERR %s < %t
|
||||
|
||||
# ERR-NOT: remark
|
||||
# ERR-GFX910: remark: <unknown>:0:0: cannot select: %2:sgpr(<2 x s16>) = G_LSHR %0:sgpr, %1:sgpr(<2 x s16>) (in function: lshr_v2s16_ss)
|
||||
# ERR-GFX910-NEXT: remark: <unknown>:0:0: cannot select: %2:vgpr(<2 x s16>) = G_LSHR %0:sgpr, %1:vgpr(<2 x s16>) (in function: lshr_v2s16_sv)
|
||||
# ERR-GFX910-NEXT: remark: <unknown>:0:0: cannot select: %2:vgpr(<2 x s16>) = G_LSHR %0:vgpr, %1:sgpr(<2 x s16>) (in function: lshr_v2s16_vs)
|
||||
# ERR-GFX910-NEXT: remark: <unknown>:0:0: cannot select: %2:vgpr(<2 x s16>) = G_LSHR %0:vgpr, %1:vgpr(<2 x s16>) (in function: lshr_v2s16_vv)
|
||||
# ERR-NOT: remark
|
||||
|
||||
---
|
||||
name: lshr_v2s16_ss
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $sgpr0, $sgpr1
|
||||
; GFX6-LABEL: name: lshr_v2s16_ss
|
||||
; GFX6: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
|
||||
; GFX6: [[COPY1:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr1
|
||||
; GFX6: [[LSHR:%[0-9]+]]:sgpr(<2 x s16>) = G_LSHR [[COPY]], [[COPY1]](<2 x s16>)
|
||||
; GFX6: S_ENDPGM 0, implicit [[LSHR]](<2 x s16>)
|
||||
; GFX7-LABEL: name: lshr_v2s16_ss
|
||||
; GFX7: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
|
||||
; GFX7: [[COPY1:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr1
|
||||
; GFX7: [[LSHR:%[0-9]+]]:sgpr(<2 x s16>) = G_LSHR [[COPY]], [[COPY1]](<2 x s16>)
|
||||
; GFX7: S_ENDPGM 0, implicit [[LSHR]](<2 x s16>)
|
||||
; GFX8-LABEL: name: lshr_v2s16_ss
|
||||
; GFX8: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
|
||||
; GFX8: [[COPY1:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr1
|
||||
; GFX8: [[LSHR:%[0-9]+]]:sgpr(<2 x s16>) = G_LSHR [[COPY]], [[COPY1]](<2 x s16>)
|
||||
; GFX8: S_ENDPGM 0, implicit [[LSHR]](<2 x s16>)
|
||||
; GFX9-LABEL: name: lshr_v2s16_ss
|
||||
; GFX9: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
|
||||
; GFX9: [[COPY1:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr1
|
||||
; GFX9: [[LSHR:%[0-9]+]]:sgpr(<2 x s16>) = G_LSHR [[COPY]], [[COPY1]](<2 x s16>)
|
||||
; GFX9: S_ENDPGM 0, implicit [[LSHR]](<2 x s16>)
|
||||
; GFX10-LABEL: name: lshr_v2s16_ss
|
||||
; GFX10: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
|
||||
; GFX10: [[COPY1:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr1
|
||||
; GFX10: [[LSHR:%[0-9]+]]:sgpr(<2 x s16>) = G_LSHR [[COPY]], [[COPY1]](<2 x s16>)
|
||||
; GFX10: S_ENDPGM 0, implicit [[LSHR]](<2 x s16>)
|
||||
%0:sgpr(<2 x s16>) = COPY $sgpr0
|
||||
%1:sgpr(<2 x s16>) = COPY $sgpr1
|
||||
%2:sgpr(<2 x s16>) = G_LSHR %0, %1
|
||||
S_ENDPGM 0, implicit %2
|
||||
...
|
||||
|
||||
---
|
||||
name: lshr_v2s16_sv
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $sgpr0, $vgpr0
|
||||
; GFX6-LABEL: name: lshr_v2s16_sv
|
||||
; GFX6: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
|
||||
; GFX6: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
|
||||
; GFX6: [[LSHR:%[0-9]+]]:vgpr(<2 x s16>) = G_LSHR [[COPY]], [[COPY1]](<2 x s16>)
|
||||
; GFX6: S_ENDPGM 0, implicit [[LSHR]](<2 x s16>)
|
||||
; GFX7-LABEL: name: lshr_v2s16_sv
|
||||
; GFX7: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
|
||||
; GFX7: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
|
||||
; GFX7: [[LSHR:%[0-9]+]]:vgpr(<2 x s16>) = G_LSHR [[COPY]], [[COPY1]](<2 x s16>)
|
||||
; GFX7: S_ENDPGM 0, implicit [[LSHR]](<2 x s16>)
|
||||
; GFX8-LABEL: name: lshr_v2s16_sv
|
||||
; GFX8: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
|
||||
; GFX8: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
|
||||
; GFX8: [[LSHR:%[0-9]+]]:vgpr(<2 x s16>) = G_LSHR [[COPY]], [[COPY1]](<2 x s16>)
|
||||
; GFX8: S_ENDPGM 0, implicit [[LSHR]](<2 x s16>)
|
||||
; GFX9-LABEL: name: lshr_v2s16_sv
|
||||
; GFX9: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
|
||||
; GFX9: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
|
||||
; GFX9: [[LSHR:%[0-9]+]]:vgpr(<2 x s16>) = G_LSHR [[COPY]], [[COPY1]](<2 x s16>)
|
||||
; GFX9: S_ENDPGM 0, implicit [[LSHR]](<2 x s16>)
|
||||
; GFX10-LABEL: name: lshr_v2s16_sv
|
||||
; GFX10: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
|
||||
; GFX10: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
|
||||
; GFX10: [[LSHR:%[0-9]+]]:vgpr(<2 x s16>) = G_LSHR [[COPY]], [[COPY1]](<2 x s16>)
|
||||
; GFX10: S_ENDPGM 0, implicit [[LSHR]](<2 x s16>)
|
||||
%0:sgpr(<2 x s16>) = COPY $sgpr0
|
||||
%1:vgpr(<2 x s16>) = COPY $vgpr0
|
||||
%2:vgpr(<2 x s16>) = G_LSHR %0, %1
|
||||
S_ENDPGM 0, implicit %2
|
||||
...
|
||||
|
||||
---
|
||||
name: lshr_v2s16_vs
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $sgpr0, $vgpr0
|
||||
; GFX6-LABEL: name: lshr_v2s16_vs
|
||||
; GFX6: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
|
||||
; GFX6: [[COPY1:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
|
||||
; GFX6: [[LSHR:%[0-9]+]]:vgpr(<2 x s16>) = G_LSHR [[COPY]], [[COPY1]](<2 x s16>)
|
||||
; GFX6: S_ENDPGM 0, implicit [[LSHR]](<2 x s16>)
|
||||
; GFX7-LABEL: name: lshr_v2s16_vs
|
||||
; GFX7: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
|
||||
; GFX7: [[COPY1:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
|
||||
; GFX7: [[LSHR:%[0-9]+]]:vgpr(<2 x s16>) = G_LSHR [[COPY]], [[COPY1]](<2 x s16>)
|
||||
; GFX7: S_ENDPGM 0, implicit [[LSHR]](<2 x s16>)
|
||||
; GFX8-LABEL: name: lshr_v2s16_vs
|
||||
; GFX8: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
|
||||
; GFX8: [[COPY1:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
|
||||
; GFX8: [[LSHR:%[0-9]+]]:vgpr(<2 x s16>) = G_LSHR [[COPY]], [[COPY1]](<2 x s16>)
|
||||
; GFX8: S_ENDPGM 0, implicit [[LSHR]](<2 x s16>)
|
||||
; GFX9-LABEL: name: lshr_v2s16_vs
|
||||
; GFX9: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
|
||||
; GFX9: [[COPY1:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
|
||||
; GFX9: [[LSHR:%[0-9]+]]:vgpr(<2 x s16>) = G_LSHR [[COPY]], [[COPY1]](<2 x s16>)
|
||||
; GFX9: S_ENDPGM 0, implicit [[LSHR]](<2 x s16>)
|
||||
; GFX10-LABEL: name: lshr_v2s16_vs
|
||||
; GFX10: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
|
||||
; GFX10: [[COPY1:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
|
||||
; GFX10: [[LSHR:%[0-9]+]]:vgpr(<2 x s16>) = G_LSHR [[COPY]], [[COPY1]](<2 x s16>)
|
||||
; GFX10: S_ENDPGM 0, implicit [[LSHR]](<2 x s16>)
|
||||
%0:vgpr(<2 x s16>) = COPY $vgpr0
|
||||
%1:sgpr(<2 x s16>) = COPY $sgpr0
|
||||
%2:vgpr(<2 x s16>) = G_LSHR %0, %1
|
||||
S_ENDPGM 0, implicit %2
|
||||
...
|
||||
|
||||
---
|
||||
name: lshr_v2s16_vv
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0, $vgpr1
|
||||
; GFX6-LABEL: name: lshr_v2s16_vv
|
||||
; GFX6: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
|
||||
; GFX6: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1
|
||||
; GFX6: [[LSHR:%[0-9]+]]:vgpr(<2 x s16>) = G_LSHR [[COPY]], [[COPY1]](<2 x s16>)
|
||||
; GFX6: S_ENDPGM 0, implicit [[LSHR]](<2 x s16>)
|
||||
; GFX7-LABEL: name: lshr_v2s16_vv
|
||||
; GFX7: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
|
||||
; GFX7: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1
|
||||
; GFX7: [[LSHR:%[0-9]+]]:vgpr(<2 x s16>) = G_LSHR [[COPY]], [[COPY1]](<2 x s16>)
|
||||
; GFX7: S_ENDPGM 0, implicit [[LSHR]](<2 x s16>)
|
||||
; GFX8-LABEL: name: lshr_v2s16_vv
|
||||
; GFX8: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
|
||||
; GFX8: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1
|
||||
; GFX8: [[LSHR:%[0-9]+]]:vgpr(<2 x s16>) = G_LSHR [[COPY]], [[COPY1]](<2 x s16>)
|
||||
; GFX8: S_ENDPGM 0, implicit [[LSHR]](<2 x s16>)
|
||||
; GFX9-LABEL: name: lshr_v2s16_vv
|
||||
; GFX9: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
|
||||
; GFX9: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1
|
||||
; GFX9: [[LSHR:%[0-9]+]]:vgpr(<2 x s16>) = G_LSHR [[COPY]], [[COPY1]](<2 x s16>)
|
||||
; GFX9: S_ENDPGM 0, implicit [[LSHR]](<2 x s16>)
|
||||
; GFX10-LABEL: name: lshr_v2s16_vv
|
||||
; GFX10: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
|
||||
; GFX10: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1
|
||||
; GFX10: [[LSHR:%[0-9]+]]:vgpr(<2 x s16>) = G_LSHR [[COPY]], [[COPY1]](<2 x s16>)
|
||||
; GFX10: S_ENDPGM 0, implicit [[LSHR]](<2 x s16>)
|
||||
%0:vgpr(<2 x s16>) = COPY $vgpr0
|
||||
%1:vgpr(<2 x s16>) = COPY $vgpr1
|
||||
%2:vgpr(<2 x s16>) = G_LSHR %0, %1
|
||||
S_ENDPGM 0, implicit %2
|
||||
...
|
||||
Loading…
Reference in New Issue
Block a user