RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-18 10:32:48 +02:00
Code Issues Projects Releases Wiki Activity

[Docs] fix formatting for bullet list; NFC

Browse Source 
llvm-svn: 361341
This commit is contained in:
Sanjay Patel 2019-05-22 00:48:47 +00:00
parent cd0eede62b
commit 2446864173
1 changed files with 11 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
docs/CodeGenerator.rst
View File

@ -919,23 +919,23 @@ are created from the shufflevector IR. The shufflevector forms that should be
handled include:
* Vector select --- Each element of the vector is chosen from either of the
corresponding elements of the 2 input vectors. This operation may also be
known as a "blend" or "bitwise select" in target assembly. This type of shuffle
maps directly to the ``shuffle_vector`` SelectionDAG node.
corresponding elements of the 2 input vectors. This operation may also be
known as a "blend" or "bitwise select" in target assembly. This type of shuffle
maps directly to the ``shuffle_vector`` SelectionDAG node.
* Insert subvector --- A vector is placed into a longer vector type starting
at index 0. This type of shuffle maps directly to the ``insert_subvector``
SelectionDAG node with the ``index`` operand set to 0.
at index 0. This type of shuffle maps directly to the ``insert_subvector``
SelectionDAG node with the ``index`` operand set to 0.
* Extract subvector --- A vector is pulled from a longer vector type starting
at index 0. This type of shuffle maps directly to the ``extract_subvector``
SelectionDAG node with the ``index`` operand set to 0.
at index 0. This type of shuffle maps directly to the ``extract_subvector``
SelectionDAG node with the ``index`` operand set to 0.
* Splat --- All elements of the vector have identical scalar elements. This
operation may also be known as a "broadcast" or "duplicate" in target assembly.
The shufflevector IR instruction may change the vector length, so this operation
may map to multiple SelectionDAG nodes including ``shuffle_vector``,
``concat_vectors``, ``insert_subvector``, and ``extract_subvector``.
operation may also be known as a "broadcast" or "duplicate" in target assembly.
The shufflevector IR instruction may change the vector length, so this operation
may map to multiple SelectionDAG nodes including ``shuffle_vector``,
``concat_vectors``, ``insert_subvector``, and ``extract_subvector``.
Prior to the existence of the Legalize passes, we required that every target
`selector`_ supported and handled every operator and type even if they are not