From 244b36582a9fc8557c9d7e39097f2dd287d6ecf3 Mon Sep 17 00:00:00 2001 From: Nate Begeman Date: Fri, 1 Apr 2005 08:57:43 +0000 Subject: [PATCH] Fix Olden/bh, CR0 was being set in the wrong order LowerCallTo and ISD::CALL are going to need to be modified, regs are being set in the wrong order. llvm-svn: 20981 --- lib/Target/PowerPC/PPC32ISelPattern.cpp | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/lib/Target/PowerPC/PPC32ISelPattern.cpp b/lib/Target/PowerPC/PPC32ISelPattern.cpp index 01d22e11d8b..8ea20867874 100644 --- a/lib/Target/PowerPC/PPC32ISelPattern.cpp +++ b/lib/Target/PowerPC/PPC32ISelPattern.cpp @@ -731,6 +731,7 @@ unsigned ISel::SelectExprFP(SDOperand N, unsigned Result) unsigned TrueValue = SelectExpr(N.getOperand(1)); //Use if TRUE unsigned FalseValue = SelectExpr(N.getOperand(2)); //Use if FALSE + Opc = SelectSetCR0(N.getOperand(0)); // Create an iterator with which to insert the MBB for copying the false // value and the MBB to hold the PHI instruction for this SetCC. @@ -745,11 +746,9 @@ unsigned ISel::SelectExprFP(SDOperand N, unsigned Result) // cmpTY cr0, r1, r2 // bCC copy1MBB // fallthrough --> copy0MBB - Tmp1 = SelectExpr(N.getOperand(0)); //Cond - BuildMI(BB, PPC::CMPLWI, 2, PPC::CR0).addReg(Tmp1).addImm(0); MachineBasicBlock *copy0MBB = new MachineBasicBlock(LLVM_BB); MachineBasicBlock *sinkMBB = new MachineBasicBlock(LLVM_BB); - BuildMI(BB, PPC::BNE, 2).addReg(PPC::CR0).addMBB(sinkMBB); + BuildMI(BB, Opc, 2).addReg(PPC::CR0).addMBB(sinkMBB); MachineFunction *F = BB->getParent(); F->getBasicBlockList().insert(It, copy0MBB); F->getBasicBlockList().insert(It, sinkMBB); @@ -1365,10 +1364,9 @@ unsigned ISel::SelectExpr(SDOperand N) { return 0; case ISD::SELECT: { - Opc = SelectSetCR0(N.getOperand(0)); - unsigned TrueValue = SelectExpr(N.getOperand(1)); //Use if TRUE unsigned FalseValue = SelectExpr(N.getOperand(2)); //Use if FALSE + Opc = SelectSetCR0(N.getOperand(0)); // Create an iterator with which to insert the MBB for copying the false // value and the MBB to hold the PHI instruction for this SetCC.