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[PowerPC] Better fix for PR16556.

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A more complete example of the bug in PR16556 was recently provided,
showing that the previous fix was not sufficient.  The previous fix is
reverted herein.

The real problem is that ReplaceNodeResults() uses LowerFP_TO_INT as
custom lowering for FP_TO_SINT during type legalization, without
checking whether the input type is handled by that routine.
LowerFP_TO_INT requires the input to be f32 or f64, so we fail when
the input is ppcf128.

I'm leaving the test case from the initial fix (r185821) in place, and
adding the new test as another crash-only check.

llvm-svn: 185959
This commit is contained in:
Bill Schmidt 2013-07-09 18:50:20 +00:00
parent 59ba368813
commit 2499045a19
2 changed files with 44 additions and 9 deletions
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12
lib/Target/PowerPC/PPCISelLowering.cpp
View File

@ -4720,15 +4720,6 @@ SDValue PPCTargetLowering::LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG,
SDLoc dl) const {
assert(Op.getOperand(0).getValueType().isFloatingPoint());
SDValue Src = Op.getOperand(0);
// If we have a long double here, it must be that we have an undef of
// that type. In this case return an undef of the target type.
if (Src.getValueType() == MVT::ppcf128) {
assert(Src.getOpcode() == ISD::UNDEF && "Unhandled ppcf128!");
return DAG.getNode(ISD::UNDEF, dl,
Op.getValueType().getSimpleVT().SimpleTy);
}
if (Src.getValueType() == MVT::f32)
Src = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Src);
@ -5808,6 +5799,9 @@ void PPCTargetLowering::ReplaceNodeResults(SDNode *N,
return;
}
case ISD::FP_TO_SINT:
// LowerFP_TO_INT() can only handle f32 and f64.
if (N->getOperand(0).getValueType() == MVT::ppcf128)
return;
Results.push_back(LowerFP_TO_INT(SDValue(N, 0), DAG, dl));
return;
}

41
test/CodeGen/PowerPC/pr16556-2.ll Normal file
View File

@ -0,0 +1,41 @@
; RUN: llc < %s
; This test formerly failed because of wrong custom lowering for
; fptosi of ppc_fp128.
target datalayout = "E-p:32:32:32-S0-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f16:16:16-f32:32:32-f64:64:64-f128:64:128-v64:64:64-v128:128:128-a0:0:64-n32"
target triple = "powerpc-unknown-linux-gnu"
%core.time.TickDuration = type { i64 }
@_D4core4time12TickDuration11ticksPerSecyl = global i64 0
@.str5 = internal unnamed_addr constant [40 x i8] c"..\5Cldc\5Cruntime\5Cdruntime\5Csrc\5Ccore\5Ctime.d\00"
@.str83 = internal constant [10 x i8] c"null this\00"
@.modulefilename = internal constant { i32, i8* } { i32 39, i8* getelementptr inbounds ([40 x i8]* @.str5, i32 0, i32 0) }
declare i8* @_d_assert_msg({ i32, i8* }, { i32, i8* }, i32)
define weak_odr fastcc i64 @_D4core4time12TickDuration30__T2toVAyaa7_7365636f6e6473TlZ2toMxFNaNbNfZl(%core.time.TickDuration* %.this_arg) {
entry:
%unitsPerSec = alloca i64, align 8
%tmp = icmp ne %core.time.TickDuration* %.this_arg, null
br i1 %tmp, label %noassert, label %assert
assert: ; preds = %entry
%tmp1 = load { i32, i8* }* @.modulefilename
%0 = call i8* @_d_assert_msg({ i32, i8* } { i32 9, i8* getelementptr inbounds ([10 x i8]* @.str83, i32 0, i32 0) }, { i32, i8* } %tmp1, i32 1586)
unreachable
noassert: ; preds = %entry
%tmp2 = getelementptr %core.time.TickDuration* %.this_arg, i32 0, i32 0
%tmp3 = load i64* %tmp2
%tmp4 = sitofp i64 %tmp3 to ppc_fp128
%tmp5 = load i64* @_D4core4time12TickDuration11ticksPerSecyl
%tmp6 = sitofp i64 %tmp5 to ppc_fp128
%tmp7 = fdiv ppc_fp128 %tmp6, 0xM80000000000000000000000000000000
%tmp8 = fdiv ppc_fp128 %tmp4, %tmp7
%tmp9 = fptosi ppc_fp128 %tmp8 to i64
ret i64 %tmp9
}