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[llvm-objdump] Fix incomplete relocation output for -D -r mode
This patch intends to fix incomplete relocation printing for XCOFF (potentially for other targets). Differential Revision: https://reviews.llvm.org/D77580
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# REQUIRES: x86-registered-target
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# RUN: yaml2obj < %s -o %.o
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# RUN: llvm-objdump -D -r %.o | FileCheck %s
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## The yaml file below is generated by the following C code:
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## extern char s[];
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## void *p = s + 0x60606060606060;
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--- !mach-o
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FileHeader:
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magic: 0xFEEDFACF
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cputype: 0x01000007
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cpusubtype: 0x00000003
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filetype: 0x00000001
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ncmds: 4
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sizeofcmds: 360
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flags: 0x00002000
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reserved: 0x00000000
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LoadCommands:
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- cmd: LC_SEGMENT_64
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cmdsize: 232
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segname: ''
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vmaddr: 0
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vmsize: 8
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fileoff: 392
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filesize: 8
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maxprot: 7
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initprot: 7
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nsects: 2
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flags: 0
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Sections:
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- sectname: __text
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segname: __TEXT
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addr: 0x0000000000000000
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size: 0
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offset: 0x00000188
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align: 0
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reloff: 0x00000000
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nreloc: 0
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flags: 0x80000000
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reserved1: 0x00000000
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reserved2: 0x00000000
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reserved3: 0x00000000
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content: ''
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- sectname: __data
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segname: __DATA
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addr: 0x0000000000000000
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size: 8
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offset: 0x00000188
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align: 3
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reloff: 0x00000190
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nreloc: 1
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flags: 0x00000000
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reserved1: 0x00000000
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reserved2: 0x00000000
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reserved3: 0x00000000
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content: '6060606060606000'
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- cmd: LC_BUILD_VERSION
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cmdsize: 24
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platform: 1
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minos: 659200
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sdk: 659204
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ntools: 0
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- cmd: LC_SYMTAB
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cmdsize: 24
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symoff: 408
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nsyms: 1
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stroff: 424
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strsize: 4
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- cmd: LC_DYSYMTAB
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cmdsize: 80
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ilocalsym: 0
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nlocalsym: 0
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iextdefsym: 0
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nextdefsym: 1
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iundefsym: 1
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nundefsym: 0
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tocoff: 0
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ntoc: 0
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modtaboff: 0
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nmodtab: 0
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extrefsymoff: 0
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nextrefsyms: 0
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indirectsymoff: 0
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nindirectsyms: 0
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extreloff: 0
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nextrel: 0
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locreloff: 0
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nlocrel: 0
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LinkEditData:
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NameList:
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- n_strx: 1
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n_type: 0x0F
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n_sect: 2
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n_desc: 0
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n_value: 0
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StringTable:
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- ''
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- _p
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...
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CHECK: Disassembly of section __DATA,__data:
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CHECK-EMPTY:
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CHECK-NEXT: 0000000000000000 <_p>:
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CHECK-NEXT: 0: 60 <unknown>
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CHECK-NEXT: 0000000000000000: X86_64_RELOC_UNSIGNED 0 (?,?)
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CHECK-NEXT: 1: 60 <unknown>
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CHECK-NEXT: 2: 60 <unknown>
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CHECK-NEXT: 3: 60 <unknown>
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CHECK-NEXT: 4: 60 <unknown>
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CHECK-NEXT: 5: 60 <unknown>
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CHECK-NEXT: 6: 60 <unknown>
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CHECK-NEXT: 7: 00 <unknown>
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@ -1,7 +1,7 @@
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# REQUIRES: powerpc-registered-target
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# RUN: llvm-objdump -D %p/Inputs/xcoff-section-headers.o | \
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# RUN: FileCheck --check-prefixes=CHECK,ONLY-D %s
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# RUN: FileCheck %s
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# RUN: llvm-objdump -D -r %p/Inputs/xcoff-section-headers.o | \
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# RUN: FileCheck --check-prefixes=CHECK,WITH-R %s
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@ -35,18 +35,24 @@ CHECK-NEXT: ...
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CHECK: Disassembly of section .data:
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CHECK: 00000080 <func>:
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CHECK-NEXT: 80: 00 00 00 94 <unknown>
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WITH-R-NEXT: 00000080: R_POS func
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CHECK: 00000084 <a>:
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CHECK-NEXT: 84: 00 00 00 a4 <unknown>
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WITH-R-NEXT: 00000084: R_POS a
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CHECK: 00000088 <b>:
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CHECK-NEXT: 88: 00 00 00 a0 <unknown>
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WITH-R-NEXT: 00000088: R_POS b
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CHECK: 0000008c <c>:
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CHECK-NEXT: 8c: 00 00 00 08 <unknown>
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WITH-R-NEXT: 0000008c: R_TLS c
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CHECK: 00000090 <d>:
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ONLY-D-NEXT: 90: 00 00 00 00 <unknown>
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WITH-R-NEXT: ...
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CHECK-NEXT: 90: 00 00 00 00 <unknown>
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WITH-R-NEXT: 00000090: R_TLS d
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CHECK: 00000094 <func>:
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CHECK-NEXT: 94: 00 00 00 00 <unknown>
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WITH-R-NEXT: 00000094: R_POS .func
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CHECK-NEXT: 98: 00 00 00 80 <unknown>
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WITH-R-NEXT: 00000098: R_POS TOC
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CHECK-NEXT: 9c: 00 00 00 00 <unknown>
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CHECK: 000000a0 <b>:
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CHECK-NEXT: a0: 00 00 30 39 <unknown>
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@ -1506,18 +1506,12 @@ static void disassembleObject(const Target *TheTarget, const ObjectFile *Obj,
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outs() << CommentStream.str();
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Comments.clear();
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// If disassembly has failed, continue with the next instruction, to
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// avoid analysing invalid/incomplete instruction information.
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if (!Disassembled) {
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outs() << "\n";
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Index += Size;
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continue;
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}
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// Try to resolve the target of a call, tail call, etc. to a specific
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// symbol.
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if (MIA && (MIA->isCall(Inst) || MIA->isUnconditionalBranch(Inst) ||
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MIA->isConditionalBranch(Inst))) {
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// If disassembly has failed, avoid analysing invalid/incomplete
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// instruction information. Otherwise, try to resolve the target of a
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// call, tail call, etc. to a specific symbol.
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if (Disassembled && MIA &&
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(MIA->isCall(Inst) || MIA->isUnconditionalBranch(Inst) ||
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MIA->isConditionalBranch(Inst))) {
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uint64_t Target;
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if (MIA->evaluateBranch(Inst, SectionAddr + Index, Size, Target)) {
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// In a relocatable object, the target's section must reside in
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@ -1574,7 +1568,7 @@ static void disassembleObject(const Target *TheTarget, const ObjectFile *Obj,
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// Hexagon does this in pretty printer
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if (Obj->getArch() != Triple::hexagon) {
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// Print relocation for instruction.
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// Print relocation for instruction and data.
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while (RelCur != RelEnd) {
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uint64_t Offset = RelCur->getOffset();
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// If this relocation is hidden, skip it.
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@ -1583,7 +1577,11 @@ static void disassembleObject(const Target *TheTarget, const ObjectFile *Obj,
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continue;
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}
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// Stop when RelCur's offset is past the current instruction.
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// Stop when RelCur's offset is past the disassembled
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// instruction/data. Note that it's possible the disassembled data
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// is not the complete data: we might see the relocation printed in
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// the middle of the data, but this matches the binutils objdump
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// output.
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if (Offset >= Index + Size)
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break;
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