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[X86][SSE] Added SSE2 PSUBUS tests
llvm-svn: 253783
This commit is contained in:
Simon Pilgrim
parent
1732480b50
commit
24d9446a79
@ -1,6 +1,7 @@
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; RUN: llc -mtriple=x86_64-apple-macosx10.8.0 -mattr=+ssse3 < %s | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3
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; RUN: llc -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx < %s | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
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; RUN: llc -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx2 < %s | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
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; RUN: llc < %s -mtriple=x86_64-apple-macosx10.8.0 -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
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; RUN: llc < %s -mtriple=x86_64-apple-macosx10.8.0 -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3
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; RUN: llc < %s -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
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; RUN: llc < %s -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
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define void @test1(i16* nocapture %head) nounwind {
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; SSE-LABEL: test1:
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@ -53,14 +54,25 @@ vector.ph:
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}
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define void @test3(i16* nocapture %head, i16 zeroext %w) nounwind {
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; SSE-LABEL: test3:
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; SSE: ## BB#0: ## %vector.ph
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; SSE-NEXT: movd %esi, %xmm0
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; SSE-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
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; SSE-NEXT: movdqu (%rdi), %xmm1
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; SSE-NEXT: psubusw %xmm0, %xmm1
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; SSE-NEXT: movdqu %xmm1, (%rdi)
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; SSE-NEXT: retq
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; SSE2-LABEL: test3:
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; SSE2: ## BB#0: ## %vector.ph
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; SSE2-NEXT: movd %esi, %xmm0
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,0,3]
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; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]
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; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,4,4,4]
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; SSE2-NEXT: movdqu (%rdi), %xmm1
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; SSE2-NEXT: psubusw %xmm0, %xmm1
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; SSE2-NEXT: movdqu %xmm1, (%rdi)
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; SSE2-NEXT: retq
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;
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; SSSE3-LABEL: test3:
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; SSSE3: ## BB#0: ## %vector.ph
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; SSSE3-NEXT: movd %esi, %xmm0
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; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
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; SSSE3-NEXT: movdqu (%rdi), %xmm1
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; SSSE3-NEXT: psubusw %xmm0, %xmm1
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; SSSE3-NEXT: movdqu %xmm1, (%rdi)
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; SSSE3-NEXT: retq
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;
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; AVX1-LABEL: test3:
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; AVX1: ## BB#0: ## %vector.ph
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@ -143,15 +155,27 @@ vector.ph:
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}
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define void @test6(i8* nocapture %head, i8 zeroext %w) nounwind {
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; SSE-LABEL: test6:
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; SSE: ## BB#0: ## %vector.ph
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; SSE-NEXT: movd %esi, %xmm0
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; SSE-NEXT: pxor %xmm1, %xmm1
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; SSE-NEXT: pshufb %xmm1, %xmm0
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; SSE-NEXT: movdqu (%rdi), %xmm1
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; SSE-NEXT: psubusb %xmm0, %xmm1
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; SSE-NEXT: movdqu %xmm1, (%rdi)
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; SSE-NEXT: retq
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; SSE2-LABEL: test6:
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; SSE2: ## BB#0: ## %vector.ph
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; SSE2-NEXT: movd %esi, %xmm0
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; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,0,3]
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; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]
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; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,4,4,4]
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; SSE2-NEXT: movdqu (%rdi), %xmm1
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; SSE2-NEXT: psubusb %xmm0, %xmm1
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; SSE2-NEXT: movdqu %xmm1, (%rdi)
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; SSE2-NEXT: retq
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;
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; SSSE3-LABEL: test6:
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; SSSE3: ## BB#0: ## %vector.ph
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; SSSE3-NEXT: movd %esi, %xmm0
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; SSSE3-NEXT: pxor %xmm1, %xmm1
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; SSSE3-NEXT: pshufb %xmm1, %xmm0
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; SSSE3-NEXT: movdqu (%rdi), %xmm1
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; SSSE3-NEXT: psubusb %xmm0, %xmm1
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; SSSE3-NEXT: movdqu %xmm1, (%rdi)
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; SSSE3-NEXT: retq
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;
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; AVX1-LABEL: test6:
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; AVX1: ## BB#0: ## %vector.ph
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@ -280,17 +304,31 @@ vector.ph:
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}
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define void @test9(i16* nocapture %head, i16 zeroext %w) nounwind {
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; SSE-LABEL: test9:
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; SSE: ## BB#0: ## %vector.ph
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; SSE-NEXT: movd %esi, %xmm0
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; SSE-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
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; SSE-NEXT: movdqu (%rdi), %xmm1
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; SSE-NEXT: movdqu 16(%rdi), %xmm2
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; SSE-NEXT: psubusw %xmm0, %xmm1
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; SSE-NEXT: psubusw %xmm0, %xmm2
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; SSE-NEXT: movdqu %xmm2, 16(%rdi)
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; SSE-NEXT: movdqu %xmm1, (%rdi)
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; SSE-NEXT: retq
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; SSE2-LABEL: test9:
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; SSE2: ## BB#0: ## %vector.ph
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; SSE2-NEXT: movd %esi, %xmm0
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,0,3]
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; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]
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; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,4,4,4]
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; SSE2-NEXT: movdqu (%rdi), %xmm1
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; SSE2-NEXT: movdqu 16(%rdi), %xmm2
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; SSE2-NEXT: psubusw %xmm0, %xmm1
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; SSE2-NEXT: psubusw %xmm0, %xmm2
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; SSE2-NEXT: movdqu %xmm2, 16(%rdi)
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; SSE2-NEXT: movdqu %xmm1, (%rdi)
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; SSE2-NEXT: retq
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;
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; SSSE3-LABEL: test9:
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; SSSE3: ## BB#0: ## %vector.ph
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; SSSE3-NEXT: movd %esi, %xmm0
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; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
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; SSSE3-NEXT: movdqu (%rdi), %xmm1
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; SSSE3-NEXT: movdqu 16(%rdi), %xmm2
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; SSSE3-NEXT: psubusw %xmm0, %xmm1
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; SSSE3-NEXT: psubusw %xmm0, %xmm2
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; SSSE3-NEXT: movdqu %xmm2, 16(%rdi)
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; SSSE3-NEXT: movdqu %xmm1, (%rdi)
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; SSSE3-NEXT: retq
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;
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; AVX1-LABEL: test9:
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; AVX1: ## BB#0: ## %vector.ph
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@ -429,18 +467,33 @@ vector.ph:
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}
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define void @test12(i8* nocapture %head, i8 zeroext %w) nounwind {
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; SSE-LABEL: test12:
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; SSE: ## BB#0: ## %vector.ph
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; SSE-NEXT: movd %esi, %xmm0
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; SSE-NEXT: pxor %xmm1, %xmm1
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; SSE-NEXT: pshufb %xmm1, %xmm0
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; SSE-NEXT: movdqu (%rdi), %xmm1
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; SSE-NEXT: movdqu 16(%rdi), %xmm2
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; SSE-NEXT: psubusb %xmm0, %xmm1
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; SSE-NEXT: psubusb %xmm0, %xmm2
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; SSE-NEXT: movdqu %xmm2, 16(%rdi)
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; SSE-NEXT: movdqu %xmm1, (%rdi)
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; SSE-NEXT: retq
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; SSE2-LABEL: test12:
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; SSE2: ## BB#0: ## %vector.ph
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; SSE2-NEXT: movd %esi, %xmm0
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; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,0,3]
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; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]
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; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,4,4,4]
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; SSE2-NEXT: movdqu (%rdi), %xmm1
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; SSE2-NEXT: movdqu 16(%rdi), %xmm2
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; SSE2-NEXT: psubusb %xmm0, %xmm1
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; SSE2-NEXT: psubusb %xmm0, %xmm2
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; SSE2-NEXT: movdqu %xmm2, 16(%rdi)
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; SSE2-NEXT: movdqu %xmm1, (%rdi)
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; SSE2-NEXT: retq
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;
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; SSSE3-LABEL: test12:
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; SSSE3: ## BB#0: ## %vector.ph
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; SSSE3-NEXT: movd %esi, %xmm0
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; SSSE3-NEXT: pxor %xmm1, %xmm1
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; SSSE3-NEXT: pshufb %xmm1, %xmm0
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; SSSE3-NEXT: movdqu (%rdi), %xmm1
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; SSSE3-NEXT: movdqu 16(%rdi), %xmm2
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; SSSE3-NEXT: psubusb %xmm0, %xmm1
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; SSSE3-NEXT: psubusb %xmm0, %xmm2
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; SSSE3-NEXT: movdqu %xmm2, 16(%rdi)
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; SSSE3-NEXT: movdqu %xmm1, (%rdi)
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; SSSE3-NEXT: retq
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;
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; AVX1-LABEL: test12:
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; AVX1: ## BB#0: ## %vector.ph
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