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[X86][SSE] Tidied up tests - use standard check prefixes

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llvm-svn: 283559
This commit is contained in:
Simon Pilgrim 2016-10-07 14:42:22 +00:00
parent 12f780d0fd
commit 24e66816ec
1 changed files with 57 additions and 57 deletions
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114
test/CodeGen/X86/promote-vec3.ll
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@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefix=SSE3
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE41
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX_ANY
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX_ANY
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX_X86_64
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX-32
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX-32
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX-64
define <3 x i16> @zext_i8(<3 x i8>) {
; SSE3-LABEL: zext_i8:
@ -38,33 +38,33 @@ define <3 x i16> @zext_i8(<3 x i8>) {
; SSE41-NEXT: # kill: %CX<def> %CX<kill> %ECX<kill>
; SSE41-NEXT: retl
;
; AVX_ANY-LABEL: zext_i8:
; AVX_ANY: # BB#0:
; AVX_ANY-NEXT: vpxor %xmm0, %xmm0, %xmm0
; AVX_ANY-NEXT: vpinsrb $0, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX_ANY-NEXT: vpinsrb $4, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX_ANY-NEXT: vpinsrb $8, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX_ANY-NEXT: vmovd %xmm0, %eax
; AVX_ANY-NEXT: vpextrw $2, %xmm0, %edx
; AVX_ANY-NEXT: vpextrw $4, %xmm0, %ecx
; AVX_ANY-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
; AVX_ANY-NEXT: # kill: %DX<def> %DX<kill> %EDX<kill>
; AVX_ANY-NEXT: # kill: %CX<def> %CX<kill> %ECX<kill>
; AVX_ANY-NEXT: retl
; AVX-32-LABEL: zext_i8:
; AVX-32: # BB#0:
; AVX-32-NEXT: vpxor %xmm0, %xmm0, %xmm0
; AVX-32-NEXT: vpinsrb $0, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX-32-NEXT: vpinsrb $4, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX-32-NEXT: vpinsrb $8, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX-32-NEXT: vmovd %xmm0, %eax
; AVX-32-NEXT: vpextrw $2, %xmm0, %edx
; AVX-32-NEXT: vpextrw $4, %xmm0, %ecx
; AVX-32-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
; AVX-32-NEXT: # kill: %DX<def> %DX<kill> %EDX<kill>
; AVX-32-NEXT: # kill: %CX<def> %CX<kill> %ECX<kill>
; AVX-32-NEXT: retl
;
; AVX_X86_64-LABEL: zext_i8:
; AVX_X86_64: # BB#0:
; AVX_X86_64-NEXT: vmovd %edi, %xmm0
; AVX_X86_64-NEXT: vpinsrd $1, %esi, %xmm0, %xmm0
; AVX_X86_64-NEXT: vpinsrd $2, %edx, %xmm0, %xmm0
; AVX_X86_64-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
; AVX_X86_64-NEXT: vmovd %xmm0, %eax
; AVX_X86_64-NEXT: vpextrw $2, %xmm0, %edx
; AVX_X86_64-NEXT: vpextrw $4, %xmm0, %ecx
; AVX_X86_64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
; AVX_X86_64-NEXT: # kill: %DX<def> %DX<kill> %EDX<kill>
; AVX_X86_64-NEXT: # kill: %CX<def> %CX<kill> %ECX<kill>
; AVX_X86_64-NEXT: retq
; AVX-64-LABEL: zext_i8:
; AVX-64: # BB#0:
; AVX-64-NEXT: vmovd %edi, %xmm0
; AVX-64-NEXT: vpinsrd $1, %esi, %xmm0, %xmm0
; AVX-64-NEXT: vpinsrd $2, %edx, %xmm0, %xmm0
; AVX-64-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
; AVX-64-NEXT: vmovd %xmm0, %eax
; AVX-64-NEXT: vpextrw $2, %xmm0, %edx
; AVX-64-NEXT: vpextrw $4, %xmm0, %ecx
; AVX-64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
; AVX-64-NEXT: # kill: %DX<def> %DX<kill> %EDX<kill>
; AVX-64-NEXT: # kill: %CX<def> %CX<kill> %ECX<kill>
; AVX-64-NEXT: retq
%2 = zext <3 x i8> %0 to <3 x i16>
ret <3 x i16> %2
}
@ -103,35 +103,35 @@ define <3 x i16> @sext_i8(<3 x i8>) {
; SSE41-NEXT: # kill: %CX<def> %CX<kill> %ECX<kill>
; SSE41-NEXT: retl
;
; AVX_ANY-LABEL: sext_i8:
; AVX_ANY: # BB#0:
; AVX_ANY-NEXT: vpinsrb $0, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX_ANY-NEXT: vpinsrb $4, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX_ANY-NEXT: vpinsrb $8, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX_ANY-NEXT: vpslld $24, %xmm0, %xmm0
; AVX_ANY-NEXT: vpsrad $24, %xmm0, %xmm0
; AVX_ANY-NEXT: vmovd %xmm0, %eax
; AVX_ANY-NEXT: vpextrw $2, %xmm0, %edx
; AVX_ANY-NEXT: vpextrw $4, %xmm0, %ecx
; AVX_ANY-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
; AVX_ANY-NEXT: # kill: %DX<def> %DX<kill> %EDX<kill>
; AVX_ANY-NEXT: # kill: %CX<def> %CX<kill> %ECX<kill>
; AVX_ANY-NEXT: retl
; AVX-32-LABEL: sext_i8:
; AVX-32: # BB#0:
; AVX-32-NEXT: vpinsrb $0, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX-32-NEXT: vpinsrb $4, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX-32-NEXT: vpinsrb $8, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX-32-NEXT: vpslld $24, %xmm0, %xmm0
; AVX-32-NEXT: vpsrad $24, %xmm0, %xmm0
; AVX-32-NEXT: vmovd %xmm0, %eax
; AVX-32-NEXT: vpextrw $2, %xmm0, %edx
; AVX-32-NEXT: vpextrw $4, %xmm0, %ecx
; AVX-32-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
; AVX-32-NEXT: # kill: %DX<def> %DX<kill> %EDX<kill>
; AVX-32-NEXT: # kill: %CX<def> %CX<kill> %ECX<kill>
; AVX-32-NEXT: retl
;
; AVX_X86_64-LABEL: sext_i8:
; AVX_X86_64: # BB#0:
; AVX_X86_64-NEXT: vmovd %edi, %xmm0
; AVX_X86_64-NEXT: vpinsrd $1, %esi, %xmm0, %xmm0
; AVX_X86_64-NEXT: vpinsrd $2, %edx, %xmm0, %xmm0
; AVX_X86_64-NEXT: vpslld $24, %xmm0, %xmm0
; AVX_X86_64-NEXT: vpsrad $24, %xmm0, %xmm0
; AVX_X86_64-NEXT: vmovd %xmm0, %eax
; AVX_X86_64-NEXT: vpextrw $2, %xmm0, %edx
; AVX_X86_64-NEXT: vpextrw $4, %xmm0, %ecx
; AVX_X86_64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
; AVX_X86_64-NEXT: # kill: %DX<def> %DX<kill> %EDX<kill>
; AVX_X86_64-NEXT: # kill: %CX<def> %CX<kill> %ECX<kill>
; AVX_X86_64-NEXT: retq
; AVX-64-LABEL: sext_i8:
; AVX-64: # BB#0:
; AVX-64-NEXT: vmovd %edi, %xmm0
; AVX-64-NEXT: vpinsrd $1, %esi, %xmm0, %xmm0
; AVX-64-NEXT: vpinsrd $2, %edx, %xmm0, %xmm0
; AVX-64-NEXT: vpslld $24, %xmm0, %xmm0
; AVX-64-NEXT: vpsrad $24, %xmm0, %xmm0
; AVX-64-NEXT: vmovd %xmm0, %eax
; AVX-64-NEXT: vpextrw $2, %xmm0, %edx
; AVX-64-NEXT: vpextrw $4, %xmm0, %ecx
; AVX-64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
; AVX-64-NEXT: # kill: %DX<def> %DX<kill> %EDX<kill>
; AVX-64-NEXT: # kill: %CX<def> %CX<kill> %ECX<kill>
; AVX-64-NEXT: retq
%2 = sext <3 x i8> %0 to <3 x i16>
ret <3 x i16> %2
}