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[AIX][XCOFF] emit traceback table for function in aix

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SUMMARY:
 1. added a new option -xcoff-traceback-table to control whether generate traceback table for function.
 2. implement the functionality of emit traceback table of a function.

Reviewers: hubert.reinterpretcast, Jason Liu
Differential Revision: https://reviews.llvm.org/D92398
This commit is contained in:
diggerlin 2020-12-11 17:50:25 -05:00
parent 5daaa0b448
commit 24fcc0af13
31 changed files with 761 additions and 75 deletions
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23
include/llvm/BinaryFormat/XCOFF.h
View File

@ -18,6 +18,7 @@
namespace llvm {
class StringRef;
template <unsigned> class SmallString;
namespace XCOFF {
@ -28,6 +29,7 @@ constexpr size_t NameSize = 8;
constexpr size_t SymbolTableEntrySize = 18;
constexpr size_t RelocationSerializationSize32 = 10;
constexpr uint16_t RelocOverflow = 65535;
constexpr uint8_t AllocRegNo = 31;
enum ReservedSectionNum : int16_t { N_DEBUG = -2, N_ABS = -1, N_UNDEF = 0 };
@ -294,8 +296,27 @@ enum CFileCpuId : uint8_t {
StringRef getMappingClassString(XCOFF::StorageMappingClass SMC);
StringRef getRelocationTypeString(XCOFF::RelocationType Type);
SmallString<32> parseParmsType(uint32_t Value, unsigned ParmsNum);
struct TracebackTable {
enum LanguageID : uint8_t {
C,
Fortran,
Pascal,
Ada,
PL1,
Basic,
Lisp,
Cobol,
Modula2,
CPlusPlus,
Rpg,
PL8,
PLIX = PL8,
Assembly,
Java,
ObjectiveC
};
// Byte 1
static constexpr uint32_t VersionMask = 0xFF00'0000;
static constexpr uint8_t VersionShift = 24;
@ -381,6 +402,8 @@ enum ExtendedTBTableFlag : uint8_t {
TB_LONGTBTABLE2 = 0x01 ///< Additional tbtable extension exists
};
StringRef getNameForTracebackTableLanguageId(TracebackTable::LanguageID LangId);
} // end namespace XCOFF
} // end namespace llvm

2
include/llvm/CodeGen/CommandFlags.h
View File

@ -99,6 +99,8 @@ Optional<bool> getExplicitFunctionSections();
bool getIgnoreXCOFFVisibility();
bool getXCOFFTracebackTable();
std::string getBBSections();
std::string getStackProtectorGuard();

6
include/llvm/Target/TargetMachine.h
View File

@ -266,12 +266,16 @@ public:
return Options.FunctionSections;
}
/// Return true if visibility attribute should not be emitted in xcoff,
/// Return true if visibility attribute should not be emitted in XCOFF,
/// corresponding to -mignore-xcoff-visibility.
bool getIgnoreXCOFFVisibility() const {
return Options.IgnoreXCOFFVisibility;
}
/// Return true if XCOFF traceback table should be emitted,
/// corresponding to -xcoff-traceback-table.
bool getXCOFFTracebackTable() const { return Options.XCOFFTracebackTable; }
/// If basic blocks should be emitted into their own section,
/// corresponding to -fbasic-block-sections.
llvm::BasicBlockSection getBBSectionsType() const {

11
include/llvm/Target/TargetOptions.h
View File

@ -130,10 +130,10 @@ namespace llvm {
EnableFastISel(false), EnableGlobalISel(false), UseInitArray(false),
DisableIntegratedAS(false), RelaxELFRelocations(false),
FunctionSections(false), DataSections(false),
IgnoreXCOFFVisibility(false), UniqueSectionNames(true),
UniqueBasicBlockSectionNames(false), TrapUnreachable(false),
NoTrapAfterNoreturn(false), TLSSize(0), EmulatedTLS(false),
ExplicitEmulatedTLS(false), EnableIPRA(false),
IgnoreXCOFFVisibility(false), XCOFFTracebackTable(true),
UniqueSectionNames(true), UniqueBasicBlockSectionNames(false),
TrapUnreachable(false), NoTrapAfterNoreturn(false), TLSSize(0),
EmulatedTLS(false), ExplicitEmulatedTLS(false), EnableIPRA(false),
EmitStackSizeSection(false), EnableMachineOutliner(false),
EnableMachineFunctionSplitter(false), SupportsDefaultOutlining(false),
EmitAddrsig(false), EmitCallSiteInfo(false),
@ -247,6 +247,9 @@ namespace llvm {
/// Do not emit visibility attribute for xcoff.
unsigned IgnoreXCOFFVisibility : 1;
/// Emit XCOFF traceback table.
unsigned XCOFFTracebackTable : 1;
unsigned UniqueSectionNames : 1;
/// Use unique names for basic block sections.

53
lib/BinaryFormat/XCOFF.cpp
View File

@ -7,6 +7,7 @@
//===----------------------------------------------------------------------===//
#include "llvm/BinaryFormat/XCOFF.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/StringRef.h"
using namespace llvm;
@ -75,4 +76,56 @@ StringRef XCOFF::getRelocationTypeString(XCOFF::RelocationType Type) {
}
return "Unknown";
}
#define LANG_CASE(A) \
case XCOFF::TracebackTable::A: \
return #A;
StringRef XCOFF::getNameForTracebackTableLanguageId(
XCOFF::TracebackTable::LanguageID LangId) {
switch (LangId) {
LANG_CASE(C)
LANG_CASE(Fortran)
LANG_CASE(Pascal)
LANG_CASE(Ada)
LANG_CASE(PL1)
LANG_CASE(Basic)
LANG_CASE(Lisp)
LANG_CASE(Cobol)
LANG_CASE(Modula2)
LANG_CASE(Rpg)
LANG_CASE(PL8)
LANG_CASE(Assembly)
LANG_CASE(Java)
LANG_CASE(ObjectiveC)
LANG_CASE(CPlusPlus)
}
return "Unknown";
}
#undef LANG_CASE
SmallString<32> XCOFF::parseParmsType(uint32_t Value, unsigned ParmsNum) {
SmallString<32> ParmsType;
for (unsigned I = 0; I < ParmsNum; ++I) {
if (I != 0)
ParmsType += ", ";
if ((Value & TracebackTable::ParmTypeIsFloatingBit) == 0) {
// Fixed parameter type.
ParmsType += "i";
Value <<= 1;
} else {
if ((Value & TracebackTable::ParmTypeFloatingIsDoubleBit) == 0)
// Float parameter type.
ParmsType += "f";
else
// Double parameter type.
ParmsType += "d";
Value <<= 2;
}
}
assert(Value == 0u && "ParmsType encodes more than ParmsNum parameters.");
return ParmsType;
}
#undef RELOC_CASE

7
lib/CodeGen/CommandFlags.cpp
View File

@ -76,6 +76,7 @@ CGOPT(bool, RelaxELFRelocations)
CGOPT_EXP(bool, DataSections)
CGOPT_EXP(bool, FunctionSections)
CGOPT(bool, IgnoreXCOFFVisibility)
CGOPT(bool, XCOFFTracebackTable)
CGOPT(std::string, BBSections)
CGOPT(std::string, StackProtectorGuard)
CGOPT(unsigned, StackProtectorGuardOffset)
@ -351,6 +352,11 @@ codegen::RegisterCodeGenFlags::RegisterCodeGenFlags() {
cl::init(false));
CGBINDOPT(IgnoreXCOFFVisibility);
static cl::opt<bool> XCOFFTracebackTable(
"xcoff-traceback-table", cl::desc("Emit the XCOFF traceback table"),
cl::init(true));
CGBINDOPT(XCOFFTracebackTable);
static cl::opt<std::string> BBSections(
"basic-block-sections",
cl::desc("Emit basic blocks into separate sections"),
@ -539,6 +545,7 @@ codegen::InitTargetOptionsFromCodeGenFlags(const Triple &TheTriple) {
getExplicitDataSections().getValueOr(TheTriple.hasDefaultDataSections());
Options.FunctionSections = getFunctionSections();
Options.IgnoreXCOFFVisibility = getIgnoreXCOFFVisibility();
Options.XCOFFTracebackTable = getXCOFFTracebackTable();
Options.BBSections = getBBSectionsMode(Options);
Options.UniqueSectionNames = getUniqueSectionNames();
Options.UniqueBasicBlockSectionNames = getUniqueBasicBlockSectionNames();

23
lib/Object/XCOFFObjectFile.cpp
View File

@ -942,29 +942,6 @@ static SmallString<32> parseParmsTypeWithVecInfo(uint32_t Value,
return ParmsType;
}
static SmallString<32> parseParmsType(uint32_t Value, unsigned ParmsNum) {
SmallString<32> ParmsType;
for (unsigned I = 0; I < ParmsNum; ++I) {
if (I != 0)
ParmsType += ", ";
if ((Value & TracebackTable::ParmTypeIsFloatingBit) == 0) {
// Fixed parameter type.
ParmsType += "i";
Value <<= 1;
} else {
if ((Value & TracebackTable::ParmTypeFloatingIsDoubleBit) == 0)
// Float parameter type.
ParmsType += "f";
else
// Double parameter type.
ParmsType += "d";
Value <<= 2;
}
}
return ParmsType;
}
Expected<XCOFFTracebackTable> XCOFFTracebackTable::create(const uint8_t *Ptr,
uint64_t &Size) {
Error Err = Error::success();

250
lib/Target/PowerPC/PPCAsmPrinter.cpp
View File

@ -74,6 +74,7 @@
#include <new>
using namespace llvm;
using namespace llvm::XCOFF;
#define DEBUG_TYPE "asmprinter"
@ -163,6 +164,8 @@ private:
DenseMap<const GlobalObject *, SmallVector<const GlobalAlias *, 1>>
GOAliasMap;
void emitTracebackTable();
public:
PPCAIXAsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer)
: PPCAsmPrinter(TM, std::move(Streamer)) {
@ -186,6 +189,8 @@ public:
void emitFunctionEntryLabel() override;
void emitFunctionBodyEnd() override;
void emitEndOfAsmFile(Module &) override;
void emitLinkage(const GlobalValue *GV, MCSymbol *GVSym) const override;
@ -1731,6 +1736,251 @@ void PPCAIXAsmPrinter::SetupMachineFunction(MachineFunction &MF) {
return AsmPrinter::SetupMachineFunction(MF);
}
void PPCAIXAsmPrinter::emitFunctionBodyEnd() {
if (!TM.getXCOFFTracebackTable())
return;
emitTracebackTable();
}
void PPCAIXAsmPrinter::emitTracebackTable() {
// Create a symbol for the end of function.
MCSymbol *FuncEnd = createTempSymbol(MF->getName());
OutStreamer->emitLabel(FuncEnd);
OutStreamer->AddComment("Traceback table begin");
// Begin with a fullword of zero.
OutStreamer->emitIntValueInHexWithPadding(0, 4 /*size*/);
SmallString<128> CommentString;
raw_svector_ostream CommentOS(CommentString);
auto EmitComment = [&]() {
OutStreamer->AddComment(CommentOS.str());
CommentString.clear();
};
auto EmitCommentAndValue = [&](uint64_t Value, int Size) {
EmitComment();
OutStreamer->emitIntValueInHexWithPadding(Value, Size);
};
unsigned int Version = 0;
CommentOS << "Version = " << Version;
EmitCommentAndValue(Version, 1);
// There is a lack of information in the IR to assist with determining the
// source language. AIX exception handling mechanism would only search for
// personality routine and LSDA area when such language supports exception
// handling. So to be conservatively correct and allow runtime to do its job,
// we need to set it to C++ for now.
TracebackTable::LanguageID LanguageIdentifier =
TracebackTable::CPlusPlus; // C++
CommentOS << "Language = "
<< getNameForTracebackTableLanguageId(LanguageIdentifier);
EmitCommentAndValue(LanguageIdentifier, 1);
// This is only populated for the third and fourth bytes.
uint32_t FirstHalfOfMandatoryField = 0;
// Emit the 3rd byte of the mandatory field.
// We always set traceback offset bit to true.
FirstHalfOfMandatoryField |= TracebackTable::HasTraceBackTableOffsetMask;
const PPCFunctionInfo *FI = MF->getInfo<PPCFunctionInfo>();
const MachineRegisterInfo &MRI = MF->getRegInfo();
// Check the function uses floating-point processor instructions or not
for (unsigned Reg = PPC::F0; Reg <= PPC::F31; ++Reg) {
if (MRI.isPhysRegUsed(Reg)) {
FirstHalfOfMandatoryField |= TracebackTable::IsFloatingPointPresentMask;
break;
}
}
#define GENBOOLCOMMENT(Prefix, V, Field) \
CommentOS << (Prefix) << ((V) & (TracebackTable::Field##Mask) ? "+" : "-") \
<< #Field
#define GENVALUECOMMENT(PrefixAndName, V, Field) \
CommentOS << (PrefixAndName) << " = " \
<< static_cast<unsigned>(((V) & (TracebackTable::Field##Mask)) >> \
(TracebackTable::Field##Shift))
GENBOOLCOMMENT("", FirstHalfOfMandatoryField, IsGlobaLinkage);
GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsOutOfLineEpilogOrPrologue);
EmitComment();
GENBOOLCOMMENT("", FirstHalfOfMandatoryField, HasTraceBackTableOffset);
GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsInternalProcedure);
EmitComment();
GENBOOLCOMMENT("", FirstHalfOfMandatoryField, HasControlledStorage);
GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsTOCless);
EmitComment();
GENBOOLCOMMENT("", FirstHalfOfMandatoryField, IsFloatingPointPresent);
EmitComment();
GENBOOLCOMMENT("", FirstHalfOfMandatoryField,
IsFloatingPointOperationLogOrAbortEnabled);
EmitComment();
OutStreamer->emitIntValueInHexWithPadding(
(FirstHalfOfMandatoryField & 0x0000ff00) >> 8, 1);
// Set the 4th byte of the mandatory field.
FirstHalfOfMandatoryField |= TracebackTable::IsFunctionNamePresentMask;
static_assert(XCOFF::AllocRegNo == 31, "Unexpected register usage!");
if (MRI.isPhysRegUsed(Subtarget->isPPC64() ? PPC::X31 : PPC::R31))
FirstHalfOfMandatoryField |= TracebackTable::IsAllocaUsedMask;
const SmallVectorImpl<Register> &MustSaveCRs = FI->getMustSaveCRs();
if (!MustSaveCRs.empty())
FirstHalfOfMandatoryField |= TracebackTable::IsCRSavedMask;
if (FI->mustSaveLR())
FirstHalfOfMandatoryField |= TracebackTable::IsLRSavedMask;
GENBOOLCOMMENT("", FirstHalfOfMandatoryField, IsInterruptHandler);
GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsFunctionNamePresent);
GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsAllocaUsed);
EmitComment();
GENVALUECOMMENT("OnConditionDirective", FirstHalfOfMandatoryField,
OnConditionDirective);
GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsCRSaved);
GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsLRSaved);
EmitComment();
OutStreamer->emitIntValueInHexWithPadding((FirstHalfOfMandatoryField & 0xff),
1);
// Set the 5th byte of mandatory field.
uint32_t SecondHalfOfMandatoryField = 0;
// Always store back chain.
SecondHalfOfMandatoryField |= TracebackTable::IsBackChainStoredMask;
uint32_t FPRSaved = 0;
for (unsigned Reg = PPC::F14; Reg <= PPC::F31; ++Reg) {
if (MRI.isPhysRegModified(Reg)) {
FPRSaved = PPC::F31 - Reg + 1;
break;
}
}
SecondHalfOfMandatoryField |= (FPRSaved << TracebackTable::FPRSavedShift) &
TracebackTable::FPRSavedMask;
GENBOOLCOMMENT("", SecondHalfOfMandatoryField, IsBackChainStored);
GENBOOLCOMMENT(", ", SecondHalfOfMandatoryField, IsFixup);
GENVALUECOMMENT(", NumOfFPRsSaved", SecondHalfOfMandatoryField, FPRSaved);
EmitComment();
OutStreamer->emitIntValueInHexWithPadding(
(SecondHalfOfMandatoryField & 0xff000000) >> 24, 1);
// Set the 6th byte of mandatory field.
uint32_t GPRSaved = 0;
// X13 is reserved under 64-bit environment.
unsigned GPRBegin = Subtarget->isPPC64() ? PPC::X14 : PPC::R13;
unsigned GPREnd = Subtarget->isPPC64() ? PPC::X31 : PPC::R31;
for (unsigned Reg = GPRBegin; Reg <= GPREnd; ++Reg) {
if (MRI.isPhysRegModified(Reg)) {
GPRSaved = GPREnd - Reg + 1;
break;
}
}
SecondHalfOfMandatoryField |= (GPRSaved << TracebackTable::GPRSavedShift) &
TracebackTable::GPRSavedMask;
GENBOOLCOMMENT("", SecondHalfOfMandatoryField, HasVectorInfo);
GENBOOLCOMMENT(", ", SecondHalfOfMandatoryField, HasExtensionTable);
GENVALUECOMMENT(", NumOfGPRsSaved", SecondHalfOfMandatoryField, GPRSaved);
EmitComment();
OutStreamer->emitIntValueInHexWithPadding(
(SecondHalfOfMandatoryField & 0x00ff0000) >> 16, 1);
// Set the 7th byte of mandatory field.
uint32_t NumberOfFixedPara = FI->getFixedParamNum();
SecondHalfOfMandatoryField |=
(NumberOfFixedPara << TracebackTable::NumberOfFixedParmsShift) &
TracebackTable::NumberOfFixedParmsMask;
GENVALUECOMMENT("NumberOfFixedParms", SecondHalfOfMandatoryField,
NumberOfFixedParms);
EmitComment();
OutStreamer->emitIntValueInHexWithPadding(
(SecondHalfOfMandatoryField & 0x0000ff00) >> 8, 1);
// Set the 8th byte of mandatory field.
// Always set parameter on stack.
SecondHalfOfMandatoryField |= TracebackTable::HasParmsOnStackMask;
uint32_t NumberOfFPPara = FI->getFloatingPointParamNum();
SecondHalfOfMandatoryField |=
(NumberOfFPPara << TracebackTable::NumberOfFloatingPointParmsShift) &
TracebackTable::NumberOfFloatingPointParmsMask;
GENVALUECOMMENT("NumberOfFPParms", SecondHalfOfMandatoryField,
NumberOfFloatingPointParms);
GENBOOLCOMMENT(", ", SecondHalfOfMandatoryField, HasParmsOnStack);
EmitComment();
OutStreamer->emitIntValueInHexWithPadding(SecondHalfOfMandatoryField & 0xff,
1);
// Generate the optional fields of traceback table.
// Parameter type.
if (NumberOfFixedPara || NumberOfFPPara) {
assert((SecondHalfOfMandatoryField & TracebackTable::HasVectorInfoMask) ==
0 &&
"VectorInfo has not been implemented.");
uint32_t ParaType = FI->getParameterType();
CommentOS << "Parameter type = "
<< XCOFF::parseParmsType(ParaType,
NumberOfFixedPara + NumberOfFPPara);
EmitComment();
OutStreamer->emitIntValueInHexWithPadding(ParaType, sizeof(ParaType));
}
// Traceback table offset.
OutStreamer->AddComment("Function size");
if (FirstHalfOfMandatoryField & TracebackTable::HasTraceBackTableOffsetMask) {
MCSymbol *FuncSectSym = getObjFileLowering().getFunctionEntryPointSymbol(
&(MF->getFunction()), TM);
OutStreamer->emitAbsoluteSymbolDiff(FuncEnd, FuncSectSym, 4);
}
// Since we unset the Int_Handler.
if (FirstHalfOfMandatoryField & TracebackTable::IsInterruptHandlerMask)
report_fatal_error("Hand_Mask not implement yet");
if (FirstHalfOfMandatoryField & TracebackTable::HasControlledStorageMask)
report_fatal_error("Ctl_Info not implement yet");
if (FirstHalfOfMandatoryField & TracebackTable::IsFunctionNamePresentMask) {
StringRef Name = MF->getName().substr(0, INT16_MAX);
int16_t NameLength = Name.size();
CommentOS << "Function name len = "
<< static_cast<unsigned int>(NameLength);
EmitCommentAndValue(NameLength, 2);
OutStreamer->AddComment("Function Name");
OutStreamer->emitBytes(Name);
}
if (FirstHalfOfMandatoryField & TracebackTable::IsAllocaUsedMask) {
uint8_t AllocReg = XCOFF::AllocRegNo;
OutStreamer->AddComment("AllocaUsed");
OutStreamer->emitIntValueInHex(AllocReg, sizeof(AllocReg));
}
#undef GENBOOLCOMMENT
#undef GENVALUECOMMENT
}
void PPCAIXAsmPrinter::ValidateGV(const GlobalVariable *GV) {
// Early error checking limiting what is supported.
if (GV->isThreadLocal())

12
lib/Target/PowerPC/PPCISelLowering.cpp
View File

@ -7277,6 +7277,7 @@ SDValue PPCTargetLowering::LowerFormalArguments_AIX(
SmallVector<CCValAssign, 16> ArgLocs;
MachineFunction &MF = DAG.getMachineFunction();
MachineFrameInfo &MFI = MF.getFrameInfo();
PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>();
CCState CCInfo(CallConv, isVarArg, MF, ArgLocs, *DAG.getContext());
const EVT PtrVT = getPointerTy(MF.getDataLayout());
@ -7304,6 +7305,15 @@ SDValue PPCTargetLowering::LowerFormalArguments_AIX(
if (VA.isMemLoc() && VA.needsCustom())
continue;
if (VA.isRegLoc()) {
if (VA.getValVT().isScalarInteger())
FuncInfo->appendParameterType(PPCFunctionInfo::FixedType);
else if (VA.getValVT().isFloatingPoint() && !VA.getValVT().isVector())
FuncInfo->appendParameterType(VA.getValVT().SimpleTy == MVT::f32
? PPCFunctionInfo::ShortFloatPoint
: PPCFunctionInfo::LongFloatPoint);
}
if (Flags.isByVal() && VA.isMemLoc()) {
const unsigned Size =
alignTo(Flags.getByValSize() ? Flags.getByValSize() : PtrByteSize,
@ -7367,6 +7377,7 @@ SDValue PPCTargetLowering::LowerFormalArguments_AIX(
const CCValAssign RL = ArgLocs[I++];
HandleRegLoc(RL.getLocReg(), Offset);
FuncInfo->appendParameterType(PPCFunctionInfo::FixedType);
}
if (Offset != StackSize) {
@ -7429,7 +7440,6 @@ SDValue PPCTargetLowering::LowerFormalArguments_AIX(
// aligned stack.
CallerReservedArea =
EnsureStackAlignment(Subtarget.getFrameLowering(), CallerReservedArea);
PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>();
FuncInfo->setMinReservedArea(CallerReservedArea);
if (isVarArg) {

34
lib/Target/PowerPC/PPCMachineFunctionInfo.cpp
View File

@ -8,6 +8,7 @@
#include "PPCMachineFunctionInfo.h"
#include "llvm/ADT/Twine.h"
#include "llvm/BinaryFormat/XCOFF.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/MC/MCContext.h"
#include "llvm/Support/CommandLine.h"
@ -63,3 +64,36 @@ bool PPCFunctionInfo::isLiveInZExt(Register VReg) const {
return LiveIn.second.isZExt();
return false;
}
void PPCFunctionInfo::appendParameterType(ParamType Type) {
uint32_t CopyParamType = ParameterType;
unsigned Bits = 0;
// If it is fixed type, we only need to increase the FixedParamNum, for
// the bit encode of fixed type is bit of zero, we do not need to change the
// ParamType.
if (Type == FixedType) {
++FixedParamNum;
return;
}
++FloatingPointParamNum;
for (int I = 0;
I < static_cast<int>(FloatingPointParamNum + FixedParamNum - 1); ++I) {
if (CopyParamType & XCOFF::TracebackTable::ParmTypeIsFloatingBit) {
// '10'b => floating point short parameter.
// '11'b => floating point long parameter.
CopyParamType <<= 2;
Bits += 2;
} else {
// '0'b => fixed parameter.
CopyParamType <<= 1;
++Bits;
}
}
assert(Type != FixedType && "FixedType should already be handled.");
if (30 - Bits >= 0)
ParameterType |= Type << (30 - Bits);
}

31
lib/Target/PowerPC/PPCMachineFunctionInfo.h
View File

@ -22,6 +22,16 @@ namespace llvm {
/// PPCFunctionInfo - This class is derived from MachineFunction private
/// PowerPC target-specific information for each MachineFunction.
class PPCFunctionInfo : public MachineFunctionInfo {
public:
// The value in the ParamType are used to indicate the bitstrings used in the
// encoding format.
enum ParamType {
FixedType = 0x0,
ShortFloatPoint = 0x2,
LongFloatPoint = 0x3
};
private:
virtual void anchor();
/// FramePointerSaveIndex - Frame index of where the old frame pointer is
@ -107,6 +117,20 @@ class PPCFunctionInfo : public MachineFunctionInfo {
/// register for parameter passing.
unsigned VarArgsNumFPR = 0;
/// FixedParamNum - Number of fixed parameter.
unsigned FixedParamNum = 0;
/// FloatingParamNum - Number of floating point parameter.
unsigned FloatingPointParamNum = 0;
/// ParamType - Encode type for every parameter
/// in the order of parameters passing in.
/// Bitstring starts from the most significant (leftmost) bit.
/// '0'b => fixed parameter.
/// '10'b => floating point short parameter.
/// '11'b => floating point long parameter.
uint32_t ParameterType = 0;
/// CRSpillFrameIndex - FrameIndex for CR spill slot for 32-bit SVR4.
int CRSpillFrameIndex = 0;
@ -190,6 +214,13 @@ public:
unsigned getVarArgsNumGPR() const { return VarArgsNumGPR; }
void setVarArgsNumGPR(unsigned Num) { VarArgsNumGPR = Num; }
unsigned getFixedParamNum() const { return FixedParamNum; }
unsigned getFloatingPointParamNum() const { return FloatingPointParamNum; }
uint32_t getParameterType() const { return ParameterType; }
void appendParameterType(ParamType Type);
unsigned getVarArgsNumFPR() const { return VarArgsNumFPR; }
void setVarArgsNumFPR(unsigned Num) { VarArgsNumFPR = Num; }

4
test/CodeGen/PowerPC/aix-alias.ll
View File

@ -2,10 +2,10 @@
; is implemnted.
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \
; RUN: -mattr=-altivec -data-sections=false < %s | \
; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false < %s | \
; RUN: FileCheck --check-prefix=ASM %s
; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr4 \
; RUN: -mattr=-altivec -data-sections=false < %s | \
; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false < %s | \
; RUN: FileCheck --check-prefix=ASM %s
@var = global i32 42

4
test/CodeGen/PowerPC/aix-cc-ext-vec-abi.ll
View File

@ -1,8 +1,8 @@
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=+altivec \
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=+altivec -xcoff-traceback-table=false \
; RUN: -vec-extabi -mtriple powerpc-ibm-aix-xcoff < %s | \
; RUN: FileCheck --check-prefixes=ASM32,ASM %s
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=+altivec \
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=+altivec -xcoff-traceback-table=false \
; RUN: -vec-extabi -mtriple powerpc64-ibm-aix-xcoff < %s | \
; RUN: FileCheck --check-prefixes=ASM64,ASM %s

48
test/CodeGen/PowerPC/aix-emit-tracebacktable-clobber-register.ll Normal file
View File

@ -0,0 +1,48 @@
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \
; RUN: -mattr=-altivec -xcoff-traceback-table=true < %s | \
; RUN: FileCheck --check-prefixes=CHECK-ASM,COMMON %s
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -function-sections \
; RUN: -mcpu=pwr4 -mattr=-altivec < %s | \
; RUN: FileCheck --check-prefixes=CHECK-FUNC,COMMON %s
define float @bar() #0 {
entry:
%fvalue = alloca float, align 4
%taken = alloca i32, align 4
%data = alloca i32, align 4
store float 1.000000e+00, float* %fvalue, align 4
%0 = load float, float* %fvalue, align 4
%1 = call float asm "fneg $0,$1\0A\09", "=b,b,~{f31},~{f30},~{f29},~{f28},~{f27}"(float %0)
store float %1, float* %fvalue, align 4
store i32 123, i32* %data, align 4
%2 = load i32, i32* %data, align 4
%3 = call i32 asm "cntlzw $0, $1\0A\09", "=b,b,~{r31},~{r30},~{r29},~{r28}"(i32 %2)
store i32 %3, i32* %taken, align 4
%4 = load i32, i32* %taken, align 4
%conv = sitofp i32 %4 to float
%5 = load float, float* %fvalue, align 4
%add = fadd float %conv, %5
ret float %add
}
; COMMON: .vbyte 4, 0x00000000 # Traceback table begin
; COMMON-NEXT: .byte 0x00 # Version = 0
; COMMON-NEXT: .byte 0x09 # Language = CPlusPlus
; COMMON-NEXT: .byte 0x22 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
; COMMON-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure
; COMMON-NEXT: # -HasControlledStorage, -IsTOCless
; COMMON-NEXT: # +IsFloatingPointPresent
; COMMON-NEXT: # -IsFloatingPointOperationLogOrAbortEnabled
; COMMON-NEXT: .byte 0x60 # -IsInterruptHandler, +IsFunctionNamePresent, +IsAllocaUsed
; COMMON-NEXT: # OnConditionDirective = 0, -IsCRSaved, -IsLRSaved
; COMMON-NEXT: .byte 0x85 # +IsBackChainStored, -IsFixup, NumOfFPRsSaved = 5
; COMMON-NEXT: .byte 0x04 # -HasVectorInfo, -HasExtensionTable, NumOfGPRsSaved = 4
; COMMON-NEXT: .byte 0x00 # NumberOfFixedParms = 0
; COMMON-NEXT: .byte 0x01 # NumberOfFPParms = 0, +HasParmsOnStack
; CHECK-ASM-NEXT: .vbyte 4, L..bar0-.bar # Function size
; CHECK-FUNC-NEXT: .vbyte 4, L..bar0-.bar[PR] # Function size
; COMMON-NEXT: .vbyte 2, 0x0003 # Function name len = 3
; COMMON-NEXT: .byte 'b,'a,'r # Function Name
; COMMON-NEXT: .byte 0x1f # AllocaUsed
; COMMON-NEXT: # -- End function

218
test/CodeGen/PowerPC/aix-emit-tracebacktable.ll Normal file
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@ -0,0 +1,218 @@
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \
; RUN: -mattr=-altivec -xcoff-traceback-table=true < %s | \
; RUN: FileCheck --check-prefixes=CHECK-ASM,COMMON %s
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -function-sections \
; RUN: -mcpu=pwr4 -mattr=-altivec < %s | \
; RUN: FileCheck --check-prefixes=CHECK-FUNC,COMMON %s
%struct.S = type { i32, i32 }
%struct.D = type { float, double }
%struct.SD = type { %struct.S*, %struct.D }
@__const.main.s = private unnamed_addr constant %struct.S { i32 10, i32 20 }, align 4
@__const.main.d = private unnamed_addr constant %struct.D { float 1.000000e+01, double 2.000000e+01 }, align 8
define double @_Z10add_structifd1SP2SD1Di(i32 %value, float %fvalue, double %dvalue, %struct.S* byval(%struct.S) align 4 %s, %struct.SD* %dp, %struct.D* byval(%struct.D) align 4 %0, i32 %v2) #0 {
entry:
%d = alloca %struct.D, align 8
%value.addr = alloca i32, align 4
%fvalue.addr = alloca float, align 4
%dvalue.addr = alloca double, align 8
%dp.addr = alloca %struct.SD*, align 4
%v2.addr = alloca i32, align 4
%1 = bitcast %struct.D* %d to i8*
%2 = bitcast %struct.D* %0 to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %1, i8* align 4 %2, i32 16, i1 false)
store i32 %value, i32* %value.addr, align 4
store float %fvalue, float* %fvalue.addr, align 4
store double %dvalue, double* %dvalue.addr, align 8
store %struct.SD* %dp, %struct.SD** %dp.addr, align 4
store i32 %v2, i32* %v2.addr, align 4
%3 = load double, double* %dvalue.addr, align 8
%4 = load float, float* %fvalue.addr, align 4
%conv = fpext float %4 to double
%add = fadd double %3, %conv
%5 = load i32, i32* %value.addr, align 4
%conv1 = sitofp i32 %5 to double
%add2 = fadd double %add, %conv1
%i1 = getelementptr inbounds %struct.S, %struct.S* %s, i32 0, i32 0
%6 = load i32, i32* %i1, align 4
%conv3 = sitofp i32 %6 to double
%add4 = fadd double %add2, %conv3
%7 = load %struct.SD*, %struct.SD** %dp.addr, align 4
%d5 = getelementptr inbounds %struct.SD, %struct.SD* %7, i32 0, i32 1
%d1 = getelementptr inbounds %struct.D, %struct.D* %d5, i32 0, i32 1
%8 = load double, double* %d1, align 8
%add6 = fadd double %add4, %8
%f1 = getelementptr inbounds %struct.D, %struct.D* %d, i32 0, i32 0
%9 = load float, float* %f1, align 8
%conv7 = fpext float %9 to double
%add8 = fadd double %add6, %conv7
%10 = load i32, i32* %v2.addr, align 4
%conv9 = sitofp i32 %10 to double
%add10 = fadd double %add8, %conv9
ret double %add10
}
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture writeonly, i8* noalias nocapture readonly, i32, i1 immarg) #1
define i32 @main() {
entry:
%retval = alloca i32, align 4
%s = alloca %struct.S, align 4
%d = alloca %struct.D, align 8
%sd = alloca %struct.SD, align 8
%agg.tmp = alloca %struct.S, align 4
%agg.tmp4 = alloca %struct.D, align 8
store i32 0, i32* %retval, align 4
%0 = bitcast %struct.S* %s to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %0, i8* align 4 bitcast (%struct.S* @__const.main.s to i8*), i32 8, i1 false)
%1 = bitcast %struct.D* %d to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %1, i8* align 8 bitcast (%struct.D* @__const.main.d to i8*), i32 16, i1 false)
%sp = getelementptr inbounds %struct.SD, %struct.SD* %sd, i32 0, i32 0
store %struct.S* %s, %struct.S** %sp, align 8
%d1 = getelementptr inbounds %struct.SD, %struct.SD* %sd, i32 0, i32 1
%f1 = getelementptr inbounds %struct.D, %struct.D* %d1, i32 0, i32 0
store float 1.000000e+02, float* %f1, align 8
%d2 = getelementptr inbounds %struct.SD, %struct.SD* %sd, i32 0, i32 1
%d13 = getelementptr inbounds %struct.D, %struct.D* %d2, i32 0, i32 1
store double 2.000000e+02, double* %d13, align 8
%2 = bitcast %struct.S* %agg.tmp to i8*
%3 = bitcast %struct.S* %s to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %2, i8* align 4 %3, i32 8, i1 false)
%4 = bitcast %struct.D* %agg.tmp4 to i8*
%5 = bitcast %struct.D* %d to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %4, i8* align 8 %5, i32 16, i1 false)
%call = call double @_Z10add_structifd1SP2SD1Di(i32 1, float 2.000000e+00, double 3.000000e+00, %struct.S* byval(%struct.S) align 4 %agg.tmp, %struct.SD* %sd, %struct.D* byval(%struct.D) align 4 %agg.tmp4, i32 7)
%add = fadd double %call, 1.000000e+00
%conv = fptosi double %add to i32
ret i32 %conv
}
define double @_Z7add_bari1SfdP2SD1Di(i32 %value, %struct.S* byval(%struct.S) align 4 %s, float %fvalue, double %dvalue, %struct.SD* %dp, %struct.D* byval(%struct.D) align 4 %0, i32 %v2) #0 {
entry:
%d = alloca %struct.D, align 8
%value.addr = alloca i32, align 4
%fvalue.addr = alloca float, align 4
%dvalue.addr = alloca double, align 8
%dp.addr = alloca %struct.SD*, align 4
%v2.addr = alloca i32, align 4
%1 = bitcast %struct.D* %d to i8*
%2 = bitcast %struct.D* %0 to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %1, i8* align 4 %2, i32 16, i1 false)
store i32 %value, i32* %value.addr, align 4
store float %fvalue, float* %fvalue.addr, align 4
store double %dvalue, double* %dvalue.addr, align 8
store %struct.SD* %dp, %struct.SD** %dp.addr, align 4
store i32 %v2, i32* %v2.addr, align 4
%3 = load double, double* %dvalue.addr, align 8
%4 = load float, float* %fvalue.addr, align 4
%conv = fpext float %4 to double
%add = fadd double %3, %conv
%5 = load i32, i32* %value.addr, align 4
%conv1 = sitofp i32 %5 to double
%add2 = fadd double %add, %conv1
%i1 = getelementptr inbounds %struct.S, %struct.S* %s, i32 0, i32 0
%6 = load i32, i32* %i1, align 4
%conv3 = sitofp i32 %6 to double
%add4 = fadd double %add2, %conv3
%7 = load %struct.SD*, %struct.SD** %dp.addr, align 4
%d5 = getelementptr inbounds %struct.SD, %struct.SD* %7, i32 0, i32 1
%d1 = getelementptr inbounds %struct.D, %struct.D* %d5, i32 0, i32 1
%8 = load double, double* %d1, align 8
%add6 = fadd double %add4, %8
%f1 = getelementptr inbounds %struct.D, %struct.D* %d, i32 0, i32 0
%9 = load float, float* %f1, align 8
%conv7 = fpext float %9 to double
%add8 = fadd double %add6, %conv7
%10 = load i32, i32* %v2.addr, align 4
%conv9 = sitofp i32 %10 to double
%add10 = fadd double %add8, %conv9
ret double %add10
}
; CHECK-ASM-LABEL: ._Z10add_structifd1SP2SD1Di:{{[[:space:]] *}}# %bb.0:
; CHECK-FUNC-LABEL: csect ._Z10add_structifd1SP2SD1Di[PR],2{{[[:space:]] *}}# %bb.0:
; COMMON-NEXT: lwz 4, L..C0(2)
; COMMON-NEXT: stfs 1, -24(1)
; COMMON-NEXT: lfs 0, 0(4)
; COMMON-NEXT: lwz 4, 56(1)
; COMMON: fsub 0, 2, 0
; COMMON-NEXT: stw 9, -36(1)
; COMMON-NEXT: fadd 1, 1, 0
; COMMON-NEXT: blr
; COMMON-NEXT: L.._Z10add_structifd1SP2SD1Di0:
; COMMON-NEXT: .vbyte 4, 0x00000000 # Traceback table begin
; COMMON-NEXT: .byte 0x00 # Version = 0
; COMMON-NEXT: .byte 0x09 # Language = CPlusPlus
; COMMON-NEXT: .byte 0x22 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
; COMMON-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure
; COMMON-NEXT: # -HasControlledStorage, -IsTOCless
; COMMON-NEXT: # +IsFloatingPointPresent
; COMMON-NEXT: # -IsFloatingPointOperationLogOrAbortEnabled
; COMMON-NEXT: .byte 0x40 # -IsInterruptHandler, +IsFunctionNamePresent, -IsAllocaUsed
; COMMON-NEXT: # OnConditionDirective = 0, -IsCRSaved, -IsLRSaved
; COMMON-NEXT: .byte 0x80 # +IsBackChainStored, -IsFixup, NumOfFPRsSaved = 0
; COMMON-NEXT: .byte 0x00 # -HasVectorInfo, -HasExtensionTable, NumOfGPRsSaved = 0
; COMMON-NEXT: .byte 0x05 # NumberOfFixedParms = 5
; COMMON-NEXT: .byte 0x05 # NumberOfFPParms = 2, +HasParmsOnStack
; COMMON-NEXT: .vbyte 4, 0x58000000 # Parameter type = i, f, d, i, i, i, i
; CHECK-ASM-NEXT: .vbyte 4, L.._Z10add_structifd1SP2SD1Di0-._Z10add_structifd1SP2SD1Di # Function size
; CHECK-FUNC-NEXT: .vbyte 4, L.._Z10add_structifd1SP2SD1Di0-._Z10add_structifd1SP2SD1Di[PR] # Function size
; COMMON-NEXT: .vbyte 2, 0x001a # Function name len = 26
; COMMON-NEXT: .byte '_,'Z,'1,'0,'a,'d,'d,'_,'s,'t,'r,'u,'c,'t,'i,'f,'d,'1,'S,'P,'2,'S,'D,'1,'D,'i # Function Name
; COMMON-NEXT: # -- End function
; CHECK-ASM-LABEL: .main:{{[[:space:]] *}}# %bb.0:
; CHECK-FUNC-LABEL: .csect .main[PR],2{{[[:space:]] *}}# %bb.0
; COMMON-NEXT: mflr 0
; COMMON-NEXT: stw 0, 8(1)
; COMMON: mtlr 0
; COMMON-NEXT: blr
; COMMON-NEXT: L..main0:
; COMMON-NEXT: .vbyte 4, 0x00000000 # Traceback table begin
; COMMON-NEXT: .byte 0x00 # Version = 0
; COMMON-NEXT: .byte 0x09 # Language = CPlusPlus
; COMMON-NEXT: .byte 0x22 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
; COMMON-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure
; COMMON-NEXT: # -HasControlledStorage, -IsTOCless
; COMMON-NEXT: # +IsFloatingPointPresent
; COMMON-NEXT: # -IsFloatingPointOperationLogOrAbortEnabled
; COMMON-NEXT: .byte 0x41 # -IsInterruptHandler, +IsFunctionNamePresent, -IsAllocaUsed
; COMMON-NEXT: # OnConditionDirective = 0, -IsCRSaved, +IsLRSaved
; COMMON-NEXT: .byte 0x80 # +IsBackChainStored, -IsFixup, NumOfFPRsSaved = 0
; COMMON-NEXT: .byte 0x00 # -HasVectorInfo, -HasExtensionTable, NumOfGPRsSaved = 0
; COMMON-NEXT: .byte 0x00 # NumberOfFixedParms = 0
; COMMON-NEXT: .byte 0x01 # NumberOfFPParms = 0, +HasParmsOnStack
; CHECK-ASM-NEXT: .vbyte 4, L..main0-.main # Function size
; CHECK-FUNC-NEXT: .vbyte 4, L..main0-.main[PR] # Function size
; COMMON-NEXT: .vbyte 2, 0x0004 # Function name len = 4
; COMMON-NEXT: .byte 'm,'a,'i,'n # Function Name
; COMMON-NEXT: # -- End function
; CHECK-ASM-LABEL: ._Z7add_bari1SfdP2SD1Di:{{[[:space:]] *}}# %bb.0:
; CHECK-FUNC-LABEL: .csect ._Z7add_bari1SfdP2SD1Di[PR],2{{[[:space:]] *}}# %bb.0:
; COMMON: .vbyte 4, 0x00000000 # Traceback table begin
; COMMON-NEXT: .byte 0x00 # Version = 0
; COMMON-NEXT: .byte 0x09 # Language = CPlusPlus
; COMMON-NEXT: .byte 0x22 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
; COMMON-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure
; COMMON-NEXT: # -HasControlledStorage, -IsTOCless
; COMMON-NEXT: # +IsFloatingPointPresent
; COMMON-NEXT: # -IsFloatingPointOperationLogOrAbortEnabled
; COMMON-NEXT: .byte 0x40 # -IsInterruptHandler, +IsFunctionNamePresent, -IsAllocaUsed
; COMMON-NEXT: # OnConditionDirective = 0, -IsCRSaved, -IsLRSaved
; COMMON-NEXT: .byte 0x80 # +IsBackChainStored, -IsFixup, NumOfFPRsSaved = 0
; COMMON-NEXT: .byte 0x00 # -HasVectorInfo, -HasExtensionTable, NumOfGPRsSaved = 0
; COMMON-NEXT: .byte 0x05 # NumberOfFixedParms = 5
; COMMON-NEXT: .byte 0x05 # NumberOfFPParms = 2, +HasParmsOnStack
; COMMON-NEXT: .vbyte 4, 0x16000000 # Parameter type = i, i, i, f, d, i, i
; CHECK-ASM-NEXT: .vbyte 4, L.._Z7add_bari1SfdP2SD1Di0-._Z7add_bari1SfdP2SD1Di # Function size
; CHECK-FUNC-NEXT: .vbyte 4, L.._Z7add_bari1SfdP2SD1Di0-._Z7add_bari1SfdP2SD1Di[PR] # Function size
; COMMON-NEXT: .vbyte 2, 0x0016 # Function name len = 22
; COMMON-NEXT: .byte '_,'Z,'7,'a,'d,'d,'_,'b,'a,'r,'i,'1,'S,'f,'d,'P,'2,'S,'D,'1,'D,'i # Function Name
; COMMON-NEXT: # -- End function

8
test/CodeGen/PowerPC/aix-extern-weak.ll
View File

@ -1,15 +1,15 @@
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \
; RUN: -mattr=-altivec -data-sections=false < %s | FileCheck --check-prefixes=COMMON,BIT32 %s
; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false < %s | FileCheck --check-prefixes=COMMON,BIT32 %s
; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr4 \
; RUN: -mattr=-altivec -data-sections=false < %s | FileCheck --check-prefixes=COMMON,BIT64 %s
; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false < %s | FileCheck --check-prefixes=COMMON,BIT64 %s
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \
; RUN: -mattr=-altivec -data-sections=false -filetype=obj -o %t.o < %s
; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false -filetype=obj -o %t.o < %s
; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefix=CHECKSYM %s
; RUN: not --crash llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff \
; RUN: -mattr=-altivec -data-sections=false -filetype=obj -o %t.o 2>&1 < %s | \
; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false -filetype=obj -o %t.o 2>&1 < %s | \
; RUN: FileCheck --check-prefix=XCOFF64 %s
; XCOFF64: LLVM ERROR: 64-bit XCOFF object files are not supported yet.

8
test/CodeGen/PowerPC/aix-extern.ll
View File

@ -1,15 +1,15 @@
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \
; RUN: -mattr=-altivec -data-sections=false < %s | FileCheck --check-prefixes=COMMON,BIT32 %s
; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false < %s | FileCheck --check-prefixes=COMMON,BIT32 %s
; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr4 \
; RUN: -mattr=-altivec -data-sections=false < %s | FileCheck --check-prefixes=COMMON,BIT64 %s
; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false < %s | FileCheck --check-prefixes=COMMON,BIT64 %s
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \
; RUN: -mattr=-altivec -data-sections=false -filetype=obj -o %t.o < %s
; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false -filetype=obj -o %t.o < %s
; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefix=CHECKSYM %s
; RUN: not --crash llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff \
; RUN: -mattr=-altivec -data-sections=false -filetype=obj -o %t.o 2>&1 < %s | FileCheck --check-prefix=XCOFF64 %s
; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false -filetype=obj -o %t.o 2>&1 < %s | FileCheck --check-prefix=XCOFF64 %s
; XCOFF64: LLVM ERROR: 64-bit XCOFF object files are not supported yet.
@bar_p = global i32 (...)* @bar_ref, align 4

9
test/CodeGen/PowerPC/aix-func-align.ll
View File

@ -1,9 +1,12 @@
; This test tries to verify if a csect containing code would have the correct alignment.
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false -filetype=obj -o %t.o < %s
; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYMS %s
; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \

3
test/CodeGen/PowerPC/aix-func-dsc-gen.ll
View File

@ -1,4 +1,5 @@
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false -filetype=obj -o %t.o < %s
; RUN: llvm-readobj --symbols %t.o | FileCheck %s
define void @foo() {

6
test/CodeGen/PowerPC/aix-return55.ll
View File

@ -1,5 +1,7 @@
; RUN: llc -mcpu=pwr4 -mattr=-altivec -mtriple=powerpc-ibm-aix-xcoff -verify-machineinstrs -data-sections=false < %s | FileCheck %s
; RUN: llc -mcpu=pwr4 -mattr=-altivec -mtriple=powerpc-ibm-aix-xcoff -verify-machineinstrs -data-sections=false -filetype=obj -o %t.o < %s
; RUN: llc -mcpu=pwr4 -mattr=-altivec -mtriple=powerpc-ibm-aix-xcoff \
; RUN: -verify-machineinstrs -data-sections=false -xcoff-traceback-table=false < %s | FileCheck %s
; RUN: llc -mcpu=pwr4 -mattr=-altivec -mtriple=powerpc-ibm-aix-xcoff \
; RUN: -verify-machineinstrs -data-sections=false -xcoff-traceback-table=false -filetype=obj -o %t.o < %s
; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=CHECKOBJ %s
; RUN: llvm-readobj -sections %t.o | FileCheck --check-prefix=CHECKSECT %s

2
test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
View File

@ -1,5 +1,5 @@
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \
; RUN: -mattr=-altivec -filetype=obj -o %t.o < %s
; RUN: -mattr=-altivec -filetype=obj -xcoff-traceback-table=false -o %t.o < %s
; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=32-SYM %s

6
test/CodeGen/PowerPC/aix-weak.ll
View File

@ -1,10 +1,10 @@
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -xcoff-traceback-table=false -mcpu=pwr4 \
; RUN: -mattr=-altivec -data-sections=false < %s | FileCheck --check-prefixes=COMMON,BIT32 %s
; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr4 \
; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -xcoff-traceback-table=false -mcpu=pwr4 \
; RUN: -mattr=-altivec -data-sections=false < %s | FileCheck --check-prefixes=COMMON,BIT64 %s
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -xcoff-traceback-table=false -mcpu=pwr4 \
; RUN: -mattr=-altivec -data-sections=false -filetype=obj -o %t.o < %s
; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefix=CHECKSYM %s

21
test/CodeGen/PowerPC/aix-xcoff-data-sections.ll
View File

@ -1,26 +1,33 @@
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -data-sections < %s | \
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
; RUN: -data-sections -xcoff-traceback-table=false < %s | \
; RUN: FileCheck --check-prefixes=CHECK,CHECK32 %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff -data-sections < %s | \
; RUN: FileCheck --check-prefixes=CHECK,CHECK64 %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -filetype=obj -data-sections -o %t.o < %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
; RUN: -filetype=obj -data-sections -xcoff-traceback-table=false -o %t.o < %s
; RUN: llvm-objdump -D --symbol-description %t.o | FileCheck --check-prefix=CHECKOBJ %s
; RUN: llvm-readobj -syms %t.o | FileCheck --check-prefix=CHECKSYM %s
;; Test to see if the default is correct for -data-sections on AIX.
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff < %s | \
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false < %s | \
; RUN: FileCheck --check-prefixes=CHECK,CHECK32 %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff < %s | \
; RUN: FileCheck --check-prefixes=CHECK,CHECK64 %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false -filetype=obj -o %t.o < %s
; RUN: llvm-objdump -D --symbol-description %t.o | FileCheck --check-prefix=CHECKOBJ %s
; RUN: llvm-readobj -syms %t.o | FileCheck --check-prefix=CHECKSYM %s
;; Test to see if the default is correct for -data-sections on AIX.
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff < %s | \
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false < %s | \
; RUN: FileCheck --check-prefixes=CHECK,CHECK32 %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff < %s | \
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false < %s | \
; RUN: FileCheck --check-prefixes=CHECK,CHECK64 %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false -filetype=obj -o %t.o < %s
; RUN: llvm-objdump -D --symbol-description %t.o | FileCheck --check-prefix=CHECKOBJ %s
; RUN: llvm-readobj -syms %t.o | FileCheck --check-prefix=CHECKSYM %s

9
test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll
View File

@ -1,6 +1,9 @@
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false -filetype=obj -o %t.o < %s
; RUN: llvm-objdump -D --symbol-description %t.o | FileCheck --check-prefix=CHECKOBJ %s
; RUN: llvm-readobj -syms %t.o | FileCheck --check-prefix=CHECKSYM %s

9
test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll
View File

@ -1,10 +1,13 @@
; This file tests the codegen of mergeable const in AIX assembly.
; This file also tests mergeable const in XCOFF object file generation.
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -data-sections=false < %s | \
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
; RUN: -data-sections=false -xcoff-traceback-table=false < %s | \
; RUN: FileCheck --check-prefixes=CHECK,CHECK32 %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff -data-sections=false < %s | \
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false -data-sections=false < %s | \
; RUN: FileCheck --check-prefixes=CHECK,CHECK64 %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -data-sections=false -filetype=obj -o %t.o < %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false -data-sections=false -filetype=obj -o %t.o < %s
; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=CHECKOBJ %s
; RUN: llvm-readobj -syms %t.o | FileCheck --check-prefix=CHECKSYM %s

7
test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll
View File

@ -3,12 +3,13 @@
; the test in this file should be merged into aix-xcoff-data.ll with additional
; tests for XCOFF object files.
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec \
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -xcoff-traceback-table=false \
; RUN: -mtriple powerpc-ibm-aix-xcoff -data-sections=false < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec \
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -xcoff-traceback-table=false \
; RUN: -mtriple powerpc64-ibm-aix-xcoff -data-sections=false < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -data-sections=false -filetype=obj -o %t.o < %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false -data-sections=false -filetype=obj -o %t.o < %s
; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=CHECKOBJ %s
@magic16 = private unnamed_addr constant [4 x i16] [i16 264, i16 272, i16 213, i16 0], align 2

3
test/CodeGen/PowerPC/aix-xcoff-reloc-symb.mir
View File

@ -1,4 +1,5 @@
# RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc-ibm-aix-xcoff -x mir -verify-machineinstrs -start-after=lazy-machine-block-freq -filetype=obj -o %t.o < %s
# RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc-ibm-aix-xcoff -x mir -verify-machineinstrs \
# RUN: -xcoff-traceback-table=false -start-after=lazy-machine-block-freq -filetype=obj -o %t.o < %s
# RUN: llvm-readobj --relocs --expand-relocs -t %t.o | FileCheck --check-prefixes=RELOC,SYM %s
# RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=DIS %s

3
test/CodeGen/PowerPC/aix-xcoff-reloc.ll
View File

@ -1,4 +1,5 @@
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc-ibm-aix-xcoff -mattr=-altivec -data-sections=false -filetype=obj -o %t.o < %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc-ibm-aix-xcoff -mattr=-altivec \
; RUN: -xcoff-traceback-table=false -data-sections=false -filetype=obj -o %t.o < %s
; RUN: llvm-readobj --section-headers --file-header %t.o | \
; RUN: FileCheck --check-prefix=OBJ %s
; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck --check-prefix=RELOC %s

4
test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll
View File

@ -4,11 +4,11 @@
;; tests for 64-bit mode are omitted.
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \
; RUN: -mattr=-altivec -data-sections=false < %s | \
; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false < %s | \
; RUN: FileCheck --check-prefix=ASM %s
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \
; RUN: -mattr=-altivec -data-sections=false -filetype=obj -o %t.o < %s
; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false -filetype=obj -o %t.o < %s
; RUN: llvm-objdump -D -r --symbol-description %t.o | \
; RUN: FileCheck --check-prefix=OBJ %s

3
test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll
View File

@ -1,4 +1,5 @@
; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false -filetype=obj -o %t.o < %s
; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=CHECK %s
define i32 @foo() #0 {

9
test/CodeGen/PowerPC/aix-xcoff-toc.ll
View File

@ -1,9 +1,12 @@
; This file tests TOC entry generation and undefined symbol generation.
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck --check-prefixes CHECK,CHECK32 %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck --check-prefixes CHECK,CHECK64 %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false < %s | FileCheck --check-prefixes CHECK,CHECK32 %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false < %s 2>&1 | FileCheck --check-prefixes CHECK,CHECK64 %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
; RUN: --xcoff-traceback-table=false -filetype=obj -o %t.o < %s
; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYM %s
; RUN: not --crash llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff -filetype=obj -o %t.o 2>&1 \