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[X86][3DNow] Add 3DNow! instruction itinerary and scheduling classes
llvm-svn: 319005
This commit is contained in:
Simon Pilgrim
parent
bc277bc1b0
commit
2526e6aeb4
@ -12,68 +12,106 @@
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//
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//===----------------------------------------------------------------------===//
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class I3DNow<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag> pat>
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: I<o, F, outs, ins, asm, pat>, TB, Requires<[Has3DNow]> {
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let Sched = WriteFAdd in {
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def I3DNOW_FALU_ITINS : OpndItins<
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IIC_3DNOW_FALU_RR, IIC_3DNOW_FALU_RM
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>;
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}
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class I3DNow_binop<bits<8> o, Format F, dag ins, string Mnemonic, list<dag> pat>
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let Sched = WriteCvtF2I in {
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def I3DNOW_FCVT_F2I_ITINS : OpndItins<
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IIC_3DNOW_FCVT_F2I_RR, IIC_3DNOW_FCVT_F2I_RM
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>;
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}
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let Sched = WriteCvtI2F in {
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def I3DNOW_FCVT_I2F_ITINS : OpndItins<
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IIC_3DNOW_FCVT_I2F_RR, IIC_3DNOW_FCVT_I2F_RM
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>;
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}
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let Sched = WriteVecIMul in {
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def I3DNOW_MISC_FUNC_ITINS : OpndItins<
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IIC_3DNOW_MISC_FUNC_REG, IIC_3DNOW_MISC_FUNC_MEM
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>;
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}
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let Sched = WriteShuffle in {
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def I3DNOW_PSHUF_ITINS : OpndItins<
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IIC_MMX_PSHUF, IIC_MMX_PSHUF
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>;
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}
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class I3DNow<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag> pat,
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InstrItinClass itin = NoItinerary>
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: I<o, F, outs, ins, asm, pat, itin>, TB, Requires<[Has3DNow]> {
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}
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class I3DNow_binop<bits<8> o, Format F, dag ins, string Mnemonic, list<dag> pat,
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InstrItinClass itin>
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: I3DNow<o, F, (outs VR64:$dst), ins,
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!strconcat(Mnemonic, "\t{$src2, $dst|$dst, $src2}"), pat>,
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!strconcat(Mnemonic, "\t{$src2, $dst|$dst, $src2}"), pat, itin>,
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Has3DNow0F0FOpcode {
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// FIXME: The disassembler doesn't support Has3DNow0F0FOpcode yet.
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let isAsmParserOnly = 1;
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let Constraints = "$src1 = $dst";
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}
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class I3DNow_conv<bits<8> o, Format F, dag ins, string Mnemonic, list<dag> pat>
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class I3DNow_conv<bits<8> o, Format F, dag ins, string Mnemonic, list<dag> pat,
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InstrItinClass itin>
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: I3DNow<o, F, (outs VR64:$dst), ins,
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!strconcat(Mnemonic, "\t{$src, $dst|$dst, $src}"), pat>,
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!strconcat(Mnemonic, "\t{$src, $dst|$dst, $src}"), pat, itin>,
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Has3DNow0F0FOpcode {
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// FIXME: The disassembler doesn't support Has3DNow0F0FOpcode yet.
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let isAsmParserOnly = 1;
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}
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multiclass I3DNow_binop_rm_int<bits<8> opc, string Mn, bit Commutable = 0,
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string Ver = ""> {
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multiclass I3DNow_binop_rm_int<bits<8> opc, string Mn, OpndItins itins,
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bit Commutable = 0, string Ver = ""> {
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let isCommutable = Commutable in
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def rr : I3DNow_binop<opc, MRMSrcReg, (ins VR64:$src1, VR64:$src2), Mn,
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[(set VR64:$dst, (!cast<Intrinsic>(
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!strconcat("int_x86_3dnow", Ver, "_", Mn)) VR64:$src1, VR64:$src2))]>;
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!strconcat("int_x86_3dnow", Ver, "_", Mn)) VR64:$src1, VR64:$src2))],
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itins.rr>, Sched<[itins.Sched]>;
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def rm : I3DNow_binop<opc, MRMSrcMem, (ins VR64:$src1, i64mem:$src2), Mn,
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[(set VR64:$dst, (!cast<Intrinsic>(
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!strconcat("int_x86_3dnow", Ver, "_", Mn)) VR64:$src1,
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(bitconvert (load_mmx addr:$src2))))]>;
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(bitconvert (load_mmx addr:$src2))))], itins.rm>,
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Sched<[itins.Sched.Folded, ReadAfterLd]>;
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}
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multiclass I3DNow_conv_rm_int<bits<8> opc, string Mn, string Ver = ""> {
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multiclass I3DNow_conv_rm_int<bits<8> opc, string Mn, OpndItins itins,
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string Ver = ""> {
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def rr : I3DNow_conv<opc, MRMSrcReg, (ins VR64:$src), Mn,
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[(set VR64:$dst, (!cast<Intrinsic>(
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!strconcat("int_x86_3dnow", Ver, "_", Mn)) VR64:$src))]>;
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!strconcat("int_x86_3dnow", Ver, "_", Mn)) VR64:$src))], itins.rr>,
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Sched<[itins.Sched]>;
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def rm : I3DNow_conv<opc, MRMSrcMem, (ins i64mem:$src), Mn,
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[(set VR64:$dst, (!cast<Intrinsic>(
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!strconcat("int_x86_3dnow", Ver, "_", Mn))
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(bitconvert (load_mmx addr:$src))))]>;
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(bitconvert (load_mmx addr:$src))))], itins.rm>,
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Sched<[itins.Sched.Folded, ReadAfterLd]>;
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}
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defm PAVGUSB : I3DNow_binop_rm_int<0xBF, "pavgusb", 1>;
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defm PF2ID : I3DNow_conv_rm_int<0x1D, "pf2id">;
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defm PFACC : I3DNow_binop_rm_int<0xAE, "pfacc">;
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defm PFADD : I3DNow_binop_rm_int<0x9E, "pfadd", 1>;
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defm PFCMPEQ : I3DNow_binop_rm_int<0xB0, "pfcmpeq", 1>;
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defm PFCMPGE : I3DNow_binop_rm_int<0x90, "pfcmpge">;
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defm PFCMPGT : I3DNow_binop_rm_int<0xA0, "pfcmpgt">;
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defm PFMAX : I3DNow_binop_rm_int<0xA4, "pfmax">;
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defm PFMIN : I3DNow_binop_rm_int<0x94, "pfmin">;
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defm PFMUL : I3DNow_binop_rm_int<0xB4, "pfmul", 1>;
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defm PFRCP : I3DNow_conv_rm_int<0x96, "pfrcp">;
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defm PFRCPIT1 : I3DNow_binop_rm_int<0xA6, "pfrcpit1">;
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defm PFRCPIT2 : I3DNow_binop_rm_int<0xB6, "pfrcpit2">;
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defm PFRSQIT1 : I3DNow_binop_rm_int<0xA7, "pfrsqit1">;
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defm PFRSQRT : I3DNow_conv_rm_int<0x97, "pfrsqrt">;
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defm PFSUB : I3DNow_binop_rm_int<0x9A, "pfsub", 1>;
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defm PFSUBR : I3DNow_binop_rm_int<0xAA, "pfsubr", 1>;
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defm PI2FD : I3DNow_conv_rm_int<0x0D, "pi2fd">;
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defm PMULHRW : I3DNow_binop_rm_int<0xB7, "pmulhrw", 1>;
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defm PAVGUSB : I3DNow_binop_rm_int<0xBF, "pavgusb", I3DNOW_MISC_FUNC_ITINS, 1>;
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defm PF2ID : I3DNow_conv_rm_int<0x1D, "pf2id", I3DNOW_FCVT_F2I_ITINS>;
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defm PFACC : I3DNow_binop_rm_int<0xAE, "pfacc", I3DNOW_FALU_ITINS>;
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defm PFADD : I3DNow_binop_rm_int<0x9E, "pfadd", I3DNOW_FALU_ITINS, 1>;
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defm PFCMPEQ : I3DNow_binop_rm_int<0xB0, "pfcmpeq", I3DNOW_FALU_ITINS, 1>;
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defm PFCMPGE : I3DNow_binop_rm_int<0x90, "pfcmpge", I3DNOW_FALU_ITINS>;
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defm PFCMPGT : I3DNow_binop_rm_int<0xA0, "pfcmpgt", I3DNOW_FALU_ITINS>;
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defm PFMAX : I3DNow_binop_rm_int<0xA4, "pfmax", I3DNOW_FALU_ITINS>;
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defm PFMIN : I3DNow_binop_rm_int<0x94, "pfmin", I3DNOW_FALU_ITINS>;
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defm PFMUL : I3DNow_binop_rm_int<0xB4, "pfmul", I3DNOW_FALU_ITINS, 1>;
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defm PFRCP : I3DNow_conv_rm_int<0x96, "pfrcp", I3DNOW_FALU_ITINS>;
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defm PFRCPIT1 : I3DNow_binop_rm_int<0xA6, "pfrcpit1", I3DNOW_FALU_ITINS>;
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defm PFRCPIT2 : I3DNow_binop_rm_int<0xB6, "pfrcpit2", I3DNOW_FALU_ITINS>;
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defm PFRSQIT1 : I3DNow_binop_rm_int<0xA7, "pfrsqit1", I3DNOW_FALU_ITINS>;
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defm PFRSQRT : I3DNow_conv_rm_int<0x97, "pfrsqrt", I3DNOW_FALU_ITINS>;
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defm PFSUB : I3DNow_binop_rm_int<0x9A, "pfsub", I3DNOW_FALU_ITINS, 1>;
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defm PFSUBR : I3DNow_binop_rm_int<0xAA, "pfsubr", I3DNOW_FALU_ITINS, 1>;
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defm PI2FD : I3DNow_conv_rm_int<0x0D, "pi2fd", I3DNOW_FCVT_I2F_ITINS>;
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defm PMULHRW : I3DNow_binop_rm_int<0xB7, "pmulhrw", I3DNOW_MISC_FUNC_ITINS, 1>;
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def FEMMS : I3DNow<0x0E, RawFrm, (outs), (ins), "femms",
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[(int_x86_mmx_femms)]>;
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@ -87,8 +125,8 @@ def PREFETCHW : I<0x0D, MRM1m, (outs), (ins i8mem:$addr), "prefetchw\t$addr",
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Requires<[HasPrefetchW]>;
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// "3DNowA" instructions
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defm PF2IW : I3DNow_conv_rm_int<0x1C, "pf2iw", "a">;
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defm PI2FW : I3DNow_conv_rm_int<0x0C, "pi2fw", "a">;
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defm PFNACC : I3DNow_binop_rm_int<0x8A, "pfnacc", 0, "a">;
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defm PFPNACC : I3DNow_binop_rm_int<0x8E, "pfpnacc", 0, "a">;
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defm PSWAPD : I3DNow_conv_rm_int<0xBB, "pswapd", "a">;
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defm PF2IW : I3DNow_conv_rm_int<0x1C, "pf2iw", I3DNOW_FCVT_F2I_ITINS, "a">;
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defm PI2FW : I3DNow_conv_rm_int<0x0C, "pi2fw", I3DNOW_FCVT_I2F_ITINS, "a">;
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defm PFNACC : I3DNow_binop_rm_int<0x8A, "pfnacc", I3DNOW_FALU_ITINS, 0, "a">;
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defm PFPNACC : I3DNow_binop_rm_int<0x8E, "pfpnacc", I3DNOW_FALU_ITINS, 0, "a">;
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defm PSWAPD : I3DNow_conv_rm_int<0xBB, "pswapd", I3DNOW_PSHUF_ITINS, "a">;
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@ -432,6 +432,15 @@ def IIC_MMX_CVT_PD_RM : InstrItinClass;
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def IIC_MMX_CVT_PS_RR : InstrItinClass;
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def IIC_MMX_CVT_PS_RM : InstrItinClass;
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def IIC_3DNOW_FALU_RM : InstrItinClass;
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def IIC_3DNOW_FALU_RR : InstrItinClass;
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def IIC_3DNOW_FCVT_F2I_RM : InstrItinClass;
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def IIC_3DNOW_FCVT_F2I_RR : InstrItinClass;
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def IIC_3DNOW_FCVT_I2F_RM : InstrItinClass;
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def IIC_3DNOW_FCVT_I2F_RR : InstrItinClass;
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def IIC_3DNOW_MISC_FUNC_REG : InstrItinClass;
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def IIC_3DNOW_MISC_FUNC_MEM : InstrItinClass;
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def IIC_CMPX_LOCK : InstrItinClass;
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def IIC_CMPX_LOCK_8 : InstrItinClass;
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def IIC_CMPX_LOCK_8B : InstrItinClass;
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@ -14,8 +14,8 @@ declare void @llvm.x86.mmx.femms() nounwind readnone
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define i64 @test_pavgusb(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
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; CHECK-LABEL: test_pavgusb:
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; CHECK: # BB#0:
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; CHECK-NEXT: pavgusb %mm1, %mm0
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; CHECK-NEXT: pavgusb (%rdi), %mm0
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; CHECK-NEXT: pavgusb %mm1, %mm0 # sched: [5:1.00]
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; CHECK-NEXT: pavgusb (%rdi), %mm0 # sched: [9:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = call x86_mmx @llvm.x86.3dnow.pavgusb(x86_mmx %a0, x86_mmx %a1)
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@ -29,8 +29,8 @@ declare x86_mmx @llvm.x86.3dnow.pavgusb(x86_mmx, x86_mmx) nounwind readnone
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define i64 @test_pf2id(x86_mmx* %a0) optsize {
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; CHECK-LABEL: test_pf2id:
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; CHECK: # BB#0:
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; CHECK-NEXT: pf2id (%rdi), %mm0
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; CHECK-NEXT: pf2id %mm0, %mm0
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; CHECK-NEXT: pf2id (%rdi), %mm0 # sched: [7:1.00]
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; CHECK-NEXT: pf2id %mm0, %mm0 # sched: [3:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = load x86_mmx, x86_mmx *%a0, align 8
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@ -44,8 +44,8 @@ declare x86_mmx @llvm.x86.3dnow.pf2id(x86_mmx) nounwind readnone
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define i64 @test_pf2iw(x86_mmx* %a0) optsize {
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; CHECK-LABEL: test_pf2iw:
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; CHECK: # BB#0:
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; CHECK-NEXT: pf2iw (%rdi), %mm0
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; CHECK-NEXT: pf2iw %mm0, %mm0
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; CHECK-NEXT: pf2iw (%rdi), %mm0 # sched: [7:1.00]
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; CHECK-NEXT: pf2iw %mm0, %mm0 # sched: [3:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = load x86_mmx, x86_mmx *%a0, align 8
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@ -59,8 +59,8 @@ declare x86_mmx @llvm.x86.3dnowa.pf2iw(x86_mmx) nounwind readnone
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define i64 @test_pfacc(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
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; CHECK-LABEL: test_pfacc:
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; CHECK: # BB#0:
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; CHECK-NEXT: pfacc %mm1, %mm0
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; CHECK-NEXT: pfacc (%rdi), %mm0
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; CHECK-NEXT: pfacc %mm1, %mm0 # sched: [3:1.00]
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; CHECK-NEXT: pfacc (%rdi), %mm0 # sched: [7:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = call x86_mmx @llvm.x86.3dnow.pfacc(x86_mmx %a0, x86_mmx %a1)
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@ -74,8 +74,8 @@ declare x86_mmx @llvm.x86.3dnow.pfacc(x86_mmx, x86_mmx) nounwind readnone
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define i64 @test_pfadd(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
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; CHECK-LABEL: test_pfadd:
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; CHECK: # BB#0:
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; CHECK-NEXT: pfadd %mm1, %mm0
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; CHECK-NEXT: pfadd (%rdi), %mm0
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; CHECK-NEXT: pfadd %mm1, %mm0 # sched: [3:1.00]
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; CHECK-NEXT: pfadd (%rdi), %mm0 # sched: [7:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = call x86_mmx @llvm.x86.3dnow.pfadd(x86_mmx %a0, x86_mmx %a1)
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@ -89,8 +89,8 @@ declare x86_mmx @llvm.x86.3dnow.pfadd(x86_mmx, x86_mmx) nounwind readnone
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define i64 @test_pfcmpeq(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
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; CHECK-LABEL: test_pfcmpeq:
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; CHECK: # BB#0:
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; CHECK-NEXT: pfcmpeq %mm1, %mm0
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; CHECK-NEXT: pfcmpeq (%rdi), %mm0
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; CHECK-NEXT: pfcmpeq %mm1, %mm0 # sched: [3:1.00]
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; CHECK-NEXT: pfcmpeq (%rdi), %mm0 # sched: [7:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = call x86_mmx @llvm.x86.3dnow.pfcmpeq(x86_mmx %a0, x86_mmx %a1)
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@ -104,8 +104,8 @@ declare x86_mmx @llvm.x86.3dnow.pfcmpeq(x86_mmx, x86_mmx) nounwind readnone
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define i64 @test_pfcmpge(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
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; CHECK-LABEL: test_pfcmpge:
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; CHECK: # BB#0:
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; CHECK-NEXT: pfcmpge %mm1, %mm0
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; CHECK-NEXT: pfcmpge (%rdi), %mm0
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; CHECK-NEXT: pfcmpge %mm1, %mm0 # sched: [3:1.00]
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; CHECK-NEXT: pfcmpge (%rdi), %mm0 # sched: [7:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = call x86_mmx @llvm.x86.3dnow.pfcmpge(x86_mmx %a0, x86_mmx %a1)
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@ -119,8 +119,8 @@ declare x86_mmx @llvm.x86.3dnow.pfcmpge(x86_mmx, x86_mmx) nounwind readnone
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define i64 @test_pfcmpgt(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
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; CHECK-LABEL: test_pfcmpgt:
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; CHECK: # BB#0:
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; CHECK-NEXT: pfcmpgt %mm1, %mm0
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; CHECK-NEXT: pfcmpgt (%rdi), %mm0
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; CHECK-NEXT: pfcmpgt %mm1, %mm0 # sched: [3:1.00]
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; CHECK-NEXT: pfcmpgt (%rdi), %mm0 # sched: [7:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = call x86_mmx @llvm.x86.3dnow.pfcmpgt(x86_mmx %a0, x86_mmx %a1)
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@ -134,8 +134,8 @@ declare x86_mmx @llvm.x86.3dnow.pfcmpgt(x86_mmx, x86_mmx) nounwind readnone
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define i64 @test_pfmax(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
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; CHECK-LABEL: test_pfmax:
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; CHECK: # BB#0:
|
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; CHECK-NEXT: pfmax %mm1, %mm0
|
||||
; CHECK-NEXT: pfmax (%rdi), %mm0
|
||||
; CHECK-NEXT: pfmax %mm1, %mm0 # sched: [3:1.00]
|
||||
; CHECK-NEXT: pfmax (%rdi), %mm0 # sched: [7:1.00]
|
||||
; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
|
||||
; CHECK-NEXT: retq # sched: [1:1.00]
|
||||
%1 = call x86_mmx @llvm.x86.3dnow.pfmax(x86_mmx %a0, x86_mmx %a1)
|
||||
@ -149,8 +149,8 @@ declare x86_mmx @llvm.x86.3dnow.pfmax(x86_mmx, x86_mmx) nounwind readnone
|
||||
define i64 @test_pfmin(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
|
||||
; CHECK-LABEL: test_pfmin:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pfmin %mm1, %mm0
|
||||
; CHECK-NEXT: pfmin (%rdi), %mm0
|
||||
; CHECK-NEXT: pfmin %mm1, %mm0 # sched: [3:1.00]
|
||||
; CHECK-NEXT: pfmin (%rdi), %mm0 # sched: [7:1.00]
|
||||
; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
|
||||
; CHECK-NEXT: retq # sched: [1:1.00]
|
||||
%1 = call x86_mmx @llvm.x86.3dnow.pfmin(x86_mmx %a0, x86_mmx %a1)
|
||||
@ -164,8 +164,8 @@ declare x86_mmx @llvm.x86.3dnow.pfmin(x86_mmx, x86_mmx) nounwind readnone
|
||||
define i64 @test_pfmul(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
|
||||
; CHECK-LABEL: test_pfmul:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pfmul %mm1, %mm0
|
||||
; CHECK-NEXT: pfmul (%rdi), %mm0
|
||||
; CHECK-NEXT: pfmul %mm1, %mm0 # sched: [3:1.00]
|
||||
; CHECK-NEXT: pfmul (%rdi), %mm0 # sched: [7:1.00]
|
||||
; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
|
||||
; CHECK-NEXT: retq # sched: [1:1.00]
|
||||
%1 = call x86_mmx @llvm.x86.3dnow.pfmul(x86_mmx %a0, x86_mmx %a1)
|
||||
@ -179,8 +179,8 @@ declare x86_mmx @llvm.x86.3dnow.pfmul(x86_mmx, x86_mmx) nounwind readnone
|
||||
define i64 @test_pfnacc(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
|
||||
; CHECK-LABEL: test_pfnacc:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pfnacc %mm1, %mm0
|
||||
; CHECK-NEXT: pfnacc (%rdi), %mm0
|
||||
; CHECK-NEXT: pfnacc %mm1, %mm0 # sched: [3:1.00]
|
||||
; CHECK-NEXT: pfnacc (%rdi), %mm0 # sched: [7:1.00]
|
||||
; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
|
||||
; CHECK-NEXT: retq # sched: [1:1.00]
|
||||
%1 = call x86_mmx @llvm.x86.3dnowa.pfnacc(x86_mmx %a0, x86_mmx %a1)
|
||||
@ -194,8 +194,8 @@ declare x86_mmx @llvm.x86.3dnowa.pfnacc(x86_mmx, x86_mmx) nounwind readnone
|
||||
define i64 @test_pfpnacc(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
|
||||
; CHECK-LABEL: test_pfpnacc:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pfpnacc %mm1, %mm0
|
||||
; CHECK-NEXT: pfpnacc (%rdi), %mm0
|
||||
; CHECK-NEXT: pfpnacc %mm1, %mm0 # sched: [3:1.00]
|
||||
; CHECK-NEXT: pfpnacc (%rdi), %mm0 # sched: [7:1.00]
|
||||
; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
|
||||
; CHECK-NEXT: retq # sched: [1:1.00]
|
||||
%1 = call x86_mmx @llvm.x86.3dnowa.pfpnacc(x86_mmx %a0, x86_mmx %a1)
|
||||
@ -209,8 +209,8 @@ declare x86_mmx @llvm.x86.3dnowa.pfpnacc(x86_mmx, x86_mmx) nounwind readnone
|
||||
define i64 @test_pfrcp(x86_mmx* %a0) optsize {
|
||||
; CHECK-LABEL: test_pfrcp:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pfrcp (%rdi), %mm0
|
||||
; CHECK-NEXT: pfrcp %mm0, %mm0
|
||||
; CHECK-NEXT: pfrcp (%rdi), %mm0 # sched: [7:1.00]
|
||||
; CHECK-NEXT: pfrcp %mm0, %mm0 # sched: [3:1.00]
|
||||
; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
|
||||
; CHECK-NEXT: retq # sched: [1:1.00]
|
||||
%1 = load x86_mmx, x86_mmx *%a0, align 8
|
||||
@ -224,8 +224,8 @@ declare x86_mmx @llvm.x86.3dnow.pfrcp(x86_mmx) nounwind readnone
|
||||
define i64 @test_pfrcpit1(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
|
||||
; CHECK-LABEL: test_pfrcpit1:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pfrcpit1 %mm1, %mm0
|
||||
; CHECK-NEXT: pfrcpit1 (%rdi), %mm0
|
||||
; CHECK-NEXT: pfrcpit1 %mm1, %mm0 # sched: [3:1.00]
|
||||
; CHECK-NEXT: pfrcpit1 (%rdi), %mm0 # sched: [7:1.00]
|
||||
; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
|
||||
; CHECK-NEXT: retq # sched: [1:1.00]
|
||||
%1 = call x86_mmx @llvm.x86.3dnow.pfrcpit1(x86_mmx %a0, x86_mmx %a1)
|
||||
@ -239,8 +239,8 @@ declare x86_mmx @llvm.x86.3dnow.pfrcpit1(x86_mmx, x86_mmx) nounwind readnone
|
||||
define i64 @test_pfrcpit2(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
|
||||
; CHECK-LABEL: test_pfrcpit2:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pfrcpit2 %mm1, %mm0
|
||||
; CHECK-NEXT: pfrcpit2 (%rdi), %mm0
|
||||
; CHECK-NEXT: pfrcpit2 %mm1, %mm0 # sched: [3:1.00]
|
||||
; CHECK-NEXT: pfrcpit2 (%rdi), %mm0 # sched: [7:1.00]
|
||||
; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
|
||||
; CHECK-NEXT: retq # sched: [1:1.00]
|
||||
%1 = call x86_mmx @llvm.x86.3dnow.pfrcpit2(x86_mmx %a0, x86_mmx %a1)
|
||||
@ -254,8 +254,8 @@ declare x86_mmx @llvm.x86.3dnow.pfrcpit2(x86_mmx, x86_mmx) nounwind readnone
|
||||
define i64 @test_pfrsqit1(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
|
||||
; CHECK-LABEL: test_pfrsqit1:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pfrsqit1 %mm1, %mm0
|
||||
; CHECK-NEXT: pfrsqit1 (%rdi), %mm0
|
||||
; CHECK-NEXT: pfrsqit1 %mm1, %mm0 # sched: [3:1.00]
|
||||
; CHECK-NEXT: pfrsqit1 (%rdi), %mm0 # sched: [7:1.00]
|
||||
; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
|
||||
; CHECK-NEXT: retq # sched: [1:1.00]
|
||||
%1 = call x86_mmx @llvm.x86.3dnow.pfrsqit1(x86_mmx %a0, x86_mmx %a1)
|
||||
@ -269,8 +269,8 @@ declare x86_mmx @llvm.x86.3dnow.pfrsqit1(x86_mmx, x86_mmx) nounwind readnone
|
||||
define i64 @test_pfrsqrt(x86_mmx* %a0) optsize {
|
||||
; CHECK-LABEL: test_pfrsqrt:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pfrsqrt (%rdi), %mm0
|
||||
; CHECK-NEXT: pfrsqrt %mm0, %mm0
|
||||
; CHECK-NEXT: pfrsqrt (%rdi), %mm0 # sched: [7:1.00]
|
||||
; CHECK-NEXT: pfrsqrt %mm0, %mm0 # sched: [3:1.00]
|
||||
; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
|
||||
; CHECK-NEXT: retq # sched: [1:1.00]
|
||||
%1 = load x86_mmx, x86_mmx *%a0, align 8
|
||||
@ -284,8 +284,8 @@ declare x86_mmx @llvm.x86.3dnow.pfrsqrt(x86_mmx) nounwind readnone
|
||||
define i64 @test_pfsub(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
|
||||
; CHECK-LABEL: test_pfsub:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pfsub %mm1, %mm0
|
||||
; CHECK-NEXT: pfsub (%rdi), %mm0
|
||||
; CHECK-NEXT: pfsub %mm1, %mm0 # sched: [3:1.00]
|
||||
; CHECK-NEXT: pfsub (%rdi), %mm0 # sched: [7:1.00]
|
||||
; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
|
||||
; CHECK-NEXT: retq # sched: [1:1.00]
|
||||
%1 = call x86_mmx @llvm.x86.3dnow.pfsub(x86_mmx %a0, x86_mmx %a1)
|
||||
@ -299,8 +299,8 @@ declare x86_mmx @llvm.x86.3dnow.pfsub(x86_mmx, x86_mmx) nounwind readnone
|
||||
define i64 @test_pfsubr(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
|
||||
; CHECK-LABEL: test_pfsubr:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pfsubr %mm1, %mm0
|
||||
; CHECK-NEXT: pfsubr (%rdi), %mm0
|
||||
; CHECK-NEXT: pfsubr %mm1, %mm0 # sched: [3:1.00]
|
||||
; CHECK-NEXT: pfsubr (%rdi), %mm0 # sched: [7:1.00]
|
||||
; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
|
||||
; CHECK-NEXT: retq # sched: [1:1.00]
|
||||
%1 = call x86_mmx @llvm.x86.3dnow.pfsubr(x86_mmx %a0, x86_mmx %a1)
|
||||
@ -314,8 +314,8 @@ declare x86_mmx @llvm.x86.3dnow.pfsubr(x86_mmx, x86_mmx) nounwind readnone
|
||||
define i64 @test_pi2fd(x86_mmx* %a0) optsize {
|
||||
; CHECK-LABEL: test_pi2fd:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pi2fd (%rdi), %mm0
|
||||
; CHECK-NEXT: pi2fd %mm0, %mm0
|
||||
; CHECK-NEXT: pi2fd (%rdi), %mm0 # sched: [8:1.00]
|
||||
; CHECK-NEXT: pi2fd %mm0, %mm0 # sched: [4:1.00]
|
||||
; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
|
||||
; CHECK-NEXT: retq # sched: [1:1.00]
|
||||
%1 = load x86_mmx, x86_mmx *%a0, align 8
|
||||
@ -329,8 +329,8 @@ declare x86_mmx @llvm.x86.3dnow.pi2fd(x86_mmx) nounwind readnone
|
||||
define i64 @test_pi2fw(x86_mmx* %a0) optsize {
|
||||
; CHECK-LABEL: test_pi2fw:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pi2fw (%rdi), %mm0
|
||||
; CHECK-NEXT: pi2fw %mm0, %mm0
|
||||
; CHECK-NEXT: pi2fw (%rdi), %mm0 # sched: [8:1.00]
|
||||
; CHECK-NEXT: pi2fw %mm0, %mm0 # sched: [4:1.00]
|
||||
; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
|
||||
; CHECK-NEXT: retq # sched: [1:1.00]
|
||||
%1 = load x86_mmx, x86_mmx *%a0, align 8
|
||||
@ -344,8 +344,8 @@ declare x86_mmx @llvm.x86.3dnowa.pi2fw(x86_mmx) nounwind readnone
|
||||
define i64 @test_pmulhrw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
|
||||
; CHECK-LABEL: test_pmulhrw:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pmulhrw %mm1, %mm0
|
||||
; CHECK-NEXT: pmulhrw (%rdi), %mm0
|
||||
; CHECK-NEXT: pmulhrw %mm1, %mm0 # sched: [5:1.00]
|
||||
; CHECK-NEXT: pmulhrw (%rdi), %mm0 # sched: [9:1.00]
|
||||
; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
|
||||
; CHECK-NEXT: retq # sched: [1:1.00]
|
||||
%1 = call x86_mmx @llvm.x86.3dnow.pmulhrw(x86_mmx %a0, x86_mmx %a1)
|
||||
@ -359,8 +359,8 @@ declare x86_mmx @llvm.x86.3dnow.pmulhrw(x86_mmx, x86_mmx) nounwind readnone
|
||||
define i64 @test_pswapd(x86_mmx* %a0) optsize {
|
||||
; CHECK-LABEL: test_pswapd:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pswapd (%rdi), %mm0 # mm0 = mem[1,0]
|
||||
; CHECK-NEXT: pswapd %mm0, %mm0 # mm0 = mm0[1,0]
|
||||
; CHECK-NEXT: pswapd (%rdi), %mm0 # mm0 = mem[1,0] sched: [5:1.00]
|
||||
; CHECK-NEXT: pswapd %mm0, %mm0 # mm0 = mm0[1,0] sched: [1:1.00]
|
||||
; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
|
||||
; CHECK-NEXT: retq # sched: [1:1.00]
|
||||
%1 = load x86_mmx, x86_mmx *%a0, align 8
|
||||
|
||||
Loading…
Reference in New Issue
Block a user