mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-21 12:02:58 +02:00
Remove unnecessary assignment to temporary, ResultReg.
llvm-svn: 150520
This commit is contained in:
parent
c4f5e8c3e2
commit
253ed7de62
@ -1878,10 +1878,8 @@ bool ARMFastISel::ProcessCallArgs(SmallVectorImpl<Value*> &Args,
|
|||||||
case CCValAssign::Full: break;
|
case CCValAssign::Full: break;
|
||||||
case CCValAssign::SExt: {
|
case CCValAssign::SExt: {
|
||||||
MVT DestVT = VA.getLocVT();
|
MVT DestVT = VA.getLocVT();
|
||||||
unsigned ResultReg = ARMEmitIntExt(ArgVT, Arg, DestVT,
|
Arg = ARMEmitIntExt(ArgVT, Arg, DestVT, /*isZExt*/false);
|
||||||
/*isZExt*/false);
|
assert (Arg != 0 && "Failed to emit a sext");
|
||||||
assert (ResultReg != 0 && "Failed to emit a sext");
|
|
||||||
Arg = ResultReg;
|
|
||||||
ArgVT = DestVT;
|
ArgVT = DestVT;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
@ -1889,10 +1887,8 @@ bool ARMFastISel::ProcessCallArgs(SmallVectorImpl<Value*> &Args,
|
|||||||
// Intentional fall-through. Handle AExt and ZExt.
|
// Intentional fall-through. Handle AExt and ZExt.
|
||||||
case CCValAssign::ZExt: {
|
case CCValAssign::ZExt: {
|
||||||
MVT DestVT = VA.getLocVT();
|
MVT DestVT = VA.getLocVT();
|
||||||
unsigned ResultReg = ARMEmitIntExt(ArgVT, Arg, DestVT,
|
Arg = ARMEmitIntExt(ArgVT, Arg, DestVT, /*isZExt*/true);
|
||||||
/*isZExt*/true);
|
assert (Arg != 0 && "Failed to emit a sext");
|
||||||
assert (ResultReg != 0 && "Failed to emit a sext");
|
|
||||||
Arg = ResultReg;
|
|
||||||
ArgVT = DestVT;
|
ArgVT = DestVT;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user