From 25a0241f66f1cd879061da2feb560db1ce9395b0 Mon Sep 17 00:00:00 2001 From: Fangrui Song Date: Thu, 5 Mar 2020 14:18:38 -0800 Subject: [PATCH] [llvm-objdump] -d: print `00000000 :` instead of `00000000 foo:` The new behavior matches GNU objdump. A pair of angle brackets makes tests slightly easier. `.foo:` is not unique and thus cannot be used in a `CHECK-LABEL:` directive. Without `-LABEL`, the CHECK line can match the `Disassembly of section` line and causes the next `CHECK-NEXT:` to fail. ``` Disassembly of section .foo: 0000000000001634 .foo: ``` Bdragon: <> has metalinguistic connotation. it just "feels right" Reviewed By: rupprecht Differential Revision: https://reviews.llvm.org/D75713 --- test/CodeGen/AArch64/arm64-simplest-elf.ll | 2 +- test/CodeGen/AArch64/callbr-asm-obj-file.ll | 22 +- test/CodeGen/AArch64/inlineasm-ldr-pseudo.ll | 6 +- test/CodeGen/AArch64/space.ll | 2 +- test/CodeGen/AMDGPU/nop-data.ll | 4 +- test/CodeGen/AMDGPU/s_code_end.ll | 6 +- .../CodeGen/ARM/Windows/trivial-gnu-object.ll | 2 +- test/CodeGen/ARM/inlineasm-ldr-pseudo.ll | 2 +- test/CodeGen/ARM/struct_byval_arm_t1_t2.ll | 604 +++++++++--------- test/CodeGen/ARM/thumb1-varalloc.ll | 8 +- test/CodeGen/ARM/wrong-t2stmia-size-opt.ll | 2 +- test/CodeGen/BPF/objdump_cond_op.ll | 6 +- test/CodeGen/BPF/objdump_cond_op_2.ll | 6 +- test/CodeGen/BPF/objdump_two_funcs.ll | 4 +- test/CodeGen/Hexagon/S3_2op.ll | 48 +- test/CodeGen/Hexagon/vrcmpys.ll | 10 +- .../Mips/compactbranches/no-beqzc-bnezc.ll | 4 +- test/CodeGen/Mips/dsp-spill-reload.ll | 2 +- test/CodeGen/Mips/micromips-b-range.ll | 2 +- test/CodeGen/Mips/micromips-sw.ll | 4 +- .../CodeGen/Mips/unaligned-memops-mapping.mir | 4 +- test/CodeGen/PowerPC/aix-indirect-call.ll | 2 +- test/CodeGen/PowerPC/aix-return55.ll | 10 +- .../PowerPC/aix-user-defined-memcpy.ll | 4 +- .../PowerPC/aix-xcoff-mergeable-const.ll | 4 +- .../PowerPC/aix-xcoff-mergeable-str.ll | 6 +- test/CodeGen/PowerPC/aix-xcoff-reloc.ll | 16 +- test/CodeGen/PowerPC/aix-xcoff-rodata.ll | 16 +- .../PowerPC/aix-xcoff-textdisassembly.ll | 4 +- test/CodeGen/RISCV/compress-float.ll | 4 +- test/CodeGen/RISCV/compress-inline-asm.ll | 2 +- test/CodeGen/RISCV/compress.ll | 18 +- test/CodeGen/RISCV/option-norelax.ll | 2 +- test/CodeGen/RISCV/option-norvc.ll | 2 +- test/CodeGen/RISCV/option-relax.ll | 2 +- test/CodeGen/RISCV/option-rvc.ll | 2 +- test/CodeGen/Thumb/large-stack.ll | 14 +- test/CodeGen/X86/2014-08-29-CompactUnwind.ll | 2 +- test/CodeGen/X86/callbr-asm-obj-file.ll | 2 +- test/CodeGen/X86/patchable-prologue.ll | 4 +- test/DebugInfo/RISCV/dwarf-riscv-relocs.ll | 2 +- test/LTO/Resolution/X86/asm-output.ll | 2 +- .../Resolution/X86/not-prevailing-alias.ll | 2 +- .../X86/not-prevailing-variables.ll | 4 +- test/LTO/Resolution/X86/not-prevailing.ll | 2 +- test/LTO/X86/codemodel-1.ll | 2 +- test/LTO/X86/codemodel-2.ll | 2 +- test/LTO/X86/llvm-lto-output.ll | 2 +- test/MC/AArch64/label-arithmetic-elf.s | 6 +- test/MC/AMDGPU/labels-branch-gfx9.s | 4 +- test/MC/AMDGPU/labels-branch.s | 6 +- test/MC/ARM/arm-macho-calls.s | 2 +- test/MC/ARM/coff-relocations.s | 16 +- test/MC/ARM/elf-movt.s | 4 +- test/MC/ARM/sub-expr-imm.s | 2 +- test/MC/AVR/relocations-abs.s | 2 +- test/MC/BPF/insn-unit.s | 2 +- test/MC/COFF/cv-inline-linetable-unlikely.s | 2 +- test/MC/COFF/cv-inline-linetable.s | 2 +- test/MC/COFF/cv-loc-unreachable-2.s | 2 +- test/MC/COFF/cv-loc-unreachable.s | 2 +- test/MC/ELF/relax-arith.s | 22 +- test/MC/ELF/relax-arith2.s | 24 +- test/MC/ELF/relax-arith3.s | 26 +- test/MC/ELF/relax-arith4.s | 4 +- test/MC/Hexagon/missing_label.s | 2 +- test/MC/Mips/cpsetup.s | 30 +- test/MC/Mips/higher-highest-addressing.s | 4 +- test/MC/Mips/instr-analysis.s | 8 +- test/MC/Mips/micromips-jump-pc-region.s | 2 +- test/MC/Mips/mips-jump-pc-region.s | 2 +- test/MC/Mips/nacl-mask.s | 12 +- test/MC/Mips/set-defined-symbol.s | 4 +- test/MC/Mips/sext_64_32.ll | 2 +- test/MC/PowerPC/ppc64-dq-expr.s | 2 +- test/MC/PowerPC/ppc64-prefix-align.s | 8 +- test/MC/RISCV/option-mix.s | 32 +- test/MC/Sparc/sparc-tls-relocations.s | 2 +- test/MC/SystemZ/directive-insn.s | 6 +- test/MC/WebAssembly/objdump.s | 4 +- test/MC/X86/AlignedBundling/labeloffset.s | 4 +- test/MC/X86/AlignedBundling/nesting.s | 6 +- test/MC/X86/align-branch-32-1a.s | 2 +- test/MC/X86/align-branch-64-1a.s | 2 +- test/MC/X86/align-branch-64-1b.s | 2 +- test/MC/X86/align-branch-64-1c.s | 2 +- test/MC/X86/align-branch-64-1d.s | 2 +- test/MC/X86/align-branch-64-2a.s | 2 +- test/MC/X86/align-branch-64-2b.s | 2 +- test/MC/X86/align-branch-64-2c.s | 2 +- test/MC/X86/align-branch-64-3a.s | 2 +- test/MC/X86/align-branch-64-4a.s | 2 +- test/MC/X86/align-branch-64-5a.s | 2 +- test/MC/X86/align-branch-64-6a.s | 2 +- test/MC/X86/align-branch-64-7a.s | 2 +- test/MC/X86/align-branch-64-negative.s | 12 +- test/MC/X86/align-branch-64.s | 22 +- test/MC/X86/align-via-relaxation.s | 8 +- test/MC/X86/code16-32-64.s | 2 +- test/MC/X86/disassemble-zeroes.s | 12 +- test/Object/AMDGPU/objdump.s | 12 +- test/Object/Mips/feature.test | 6 +- test/Object/Mips/objdump-micro-mips.test | 4 +- ...bjdump-disassembly-inline-relocations.test | 8 +- test/Object/X86/objdump-label.test | 4 +- .../AArch64/elf-aarch64-mapping-symbols.test | 8 +- .../llvm-objdump/AArch64/macho-zerofill.s | 2 +- test/tools/llvm-objdump/AArch64/plt.test | 6 +- .../tools/llvm-objdump/AMDGPU/source-lines.ll | 4 +- .../tools/llvm-objdump/ARM/unknown-instr.test | 2 +- .../Hexagon/source-interleave-hexagon.ll | 4 +- .../llvm-objdump/PowerPC/branch-offset.s | 4 +- test/tools/llvm-objdump/X86/adjust-vma.test | 20 +- .../X86/coff-disassemble-export.test | 2 +- test/tools/llvm-objdump/X86/demangle.s | 2 +- .../X86/disassemble-functions-mangling.test | 12 +- .../X86/disassemble-functions.test | 4 +- ...mble-implied-by-disassemble-functions.test | 2 +- .../disassemble-invalid-byte-sequences.test | 2 +- ...isassemble-no-symbol-at-section-start.test | 4 +- .../X86/disassemble-section-name.s | 2 +- .../llvm-objdump/X86/disassemble-text.test | 2 +- .../X86/disassemble-zeroes-relocations.test | 2 +- .../llvm-objdump/X86/elf-disassemble-bss.test | 2 +- .../X86/elf-disassemble-dynamic-symbols.test | 20 +- .../X86/elf-disassemble-no-symtab.test | 2 +- .../elf-disassemble-symbol-labels-exec.test | 6 +- .../elf-disassemble-symbol-labels-rel.test | 8 +- .../elf-disassemble-symbol-references.yaml | 6 +- .../llvm-objdump/X86/elf-disassemble.test | 8 +- .../X86/function-sections-line-numbers.s | 4 +- .../llvm-objdump/X86/out-of-section-sym.test | 2 +- test/tools/llvm-objdump/X86/plt.test | 8 +- .../llvm-objdump/X86/print-symbol-addr.s | 12 +- .../X86/section-filter-relocs.test | 4 +- ...source-interleave-function-from-debug.test | 12 +- .../X86/source-interleave-invalid-source.test | 2 +- .../X86/source-interleave-missing-source.test | 2 +- .../X86/source-interleave-no-debug-info.test | 2 +- .../X86/source-interleave-relative-paths.test | 2 +- ...e-interleave-same-line-different-file.test | 4 +- .../X86/source-interleave-x86_64.test | 4 +- ...start-stop-address-relocatable-object.test | 6 +- .../llvm-objdump/X86/start-stop-address.test | 18 +- test/tools/llvm-objdump/embedded-source.test | 4 +- .../llvm-objdump/xcoff-disassemble-all.test | 22 +- tools/llvm-objdump/llvm-objdump.cpp | 2 +- 147 files changed, 744 insertions(+), 760 deletions(-) diff --git a/test/CodeGen/AArch64/arm64-simplest-elf.ll b/test/CodeGen/AArch64/arm64-simplest-elf.ll index 58691f8ffcd..2d6863d129d 100644 --- a/test/CodeGen/AArch64/arm64-simplest-elf.ll +++ b/test/CodeGen/AArch64/arm64-simplest-elf.ll @@ -14,5 +14,5 @@ define void @foo() nounwind { ; CHECK-ELF: file format elf64-aarch64 ; CHECK-ELF: Disassembly of section .text -; CHECK-ELF-LABEL: foo: +; CHECK-ELF-LABEL: : ; CHECK-ELF: ret diff --git a/test/CodeGen/AArch64/callbr-asm-obj-file.ll b/test/CodeGen/AArch64/callbr-asm-obj-file.ll index 345c3f9c455..a79ccc5ad3b 100644 --- a/test/CodeGen/AArch64/callbr-asm-obj-file.ll +++ b/test/CodeGen/AArch64/callbr-asm-obj-file.ll @@ -6,11 +6,11 @@ @l = common hidden local_unnamed_addr global i32 0, align 4 -; CHECK-LABEL: test1: -; CHECK-LABEL: $d.1: -; CHECK-LABEL: $x.2: +; CHECK-LABEL: : +; CHECK-LABEL: <$d.1>: +; CHECK-LABEL: <$x.2>: ; CHECK-NEXT: b #16 <$x.4+0x4> -; CHECK-LABEL: $x.4: +; CHECK-LABEL: <$x.4>: ; CHECK-NEXT: b #4 <$x.4+0x4> ; CHECK-NEXT: mov w0, wzr ; CHECK-NEXT: ldr x30, [sp], #16 @@ -40,10 +40,10 @@ declare dso_local i32 @g(...) local_unnamed_addr declare dso_local i32 @i(...) local_unnamed_addr -; CHECK-LABEL: test2: +; CHECK-LABEL: : ; CHECK: bl #0 -; CHECK-LABEL: $d.5: -; CHECK-LABEL: $x.6: +; CHECK-LABEL: <$d.5>: +; CHECK-LABEL: <$x.6>: ; CHECK-NEXT: b #16 <$x.8+0x4> define hidden i32 @test2() local_unnamed_addr { %1 = load i32, i32* @l, align 4 @@ -70,11 +70,11 @@ define hidden i32 @test2() local_unnamed_addr { ret i32 undef } -; CHECK-LABEL: test3: -; CHECK-LABEL: $d.9: -; CHECK-LABEL: $x.10: +; CHECK-LABEL: : +; CHECK-LABEL: <$d.9>: +; CHECK-LABEL: <$x.10>: ; CHECK-NEXT: b #-20 -; CHECK-LABEL: $x.12: +; CHECK-LABEL: <$x.12>: ; CHECK-NEXT: b #4 <$x.12+0x4> ; CHECK-NEXT: mov w0, wzr ; CHECK-NEXT: ldr x30, [sp], #16 diff --git a/test/CodeGen/AArch64/inlineasm-ldr-pseudo.ll b/test/CodeGen/AArch64/inlineasm-ldr-pseudo.ll index ca24fc9c880..afd367b22f6 100644 --- a/test/CodeGen/AArch64/inlineasm-ldr-pseudo.ll +++ b/test/CodeGen/AArch64/inlineasm-ldr-pseudo.ll @@ -4,7 +4,7 @@ ; demonstrate the bug. Going the asm->obj route does not show the issue. ; RUN: llc -mtriple=aarch64 < %s -filetype=obj | llvm-objdump -arch=aarch64 -d - | FileCheck %s -; CHECK-LABEL: foo: +; CHECK-LABEL: : ; CHECK: a0 79 95 d2 mov x0, #43981 ; CHECK: c0 03 5f d6 ret define i32 @foo() nounwind { @@ -12,11 +12,11 @@ entry: %0 = tail call i32 asm sideeffect "ldr $0,=0xabcd", "=r"() nounwind ret i32 %0 } -; CHECK-LABEL: bar: +; CHECK-LABEL: : ; CHECK: 40 00 00 58 ldr x0, #8 ; CHECK: c0 03 5f d6 ret ; Make sure the constant pool entry comes after the return -; CHECK-LABEL: $d.1: +; CHECK-LABEL: <$d.1>: define i32 @bar() nounwind { entry: %0 = tail call i32 asm sideeffect "ldr $0,=0x10001", "=r"() nounwind diff --git a/test/CodeGen/AArch64/space.ll b/test/CodeGen/AArch64/space.ll index 746d0377200..d58a7594136 100644 --- a/test/CodeGen/AArch64/space.ll +++ b/test/CodeGen/AArch64/space.ll @@ -10,7 +10,7 @@ entry: } ; CHECK: // SPACE ; CHECK-NEXT: ret -; DUMP-LABEL: f: +; DUMP-LABEL: : ; DUMP-NEXT: ret declare dso_local i64 @llvm.aarch64.space(i32, i64) local_unnamed_addr #0 diff --git a/test/CodeGen/AMDGPU/nop-data.ll b/test/CodeGen/AMDGPU/nop-data.ll index b3e6a6cb855..0635c76cd85 100644 --- a/test/CodeGen/AMDGPU/nop-data.ll +++ b/test/CodeGen/AMDGPU/nop-data.ll @@ -1,6 +1,6 @@ ; RUN: llc -mtriple=amdgcn--amdhsa -mattr=-code-object-v3 -mcpu=fiji -filetype=obj < %s | llvm-objdump -d - -mcpu=fiji | FileCheck %s -; CHECK: kernel0: +; CHECK: : ; CHECK-NEXT: s_endpgm define amdgpu_kernel void @kernel0() align 256 { entry: @@ -79,7 +79,7 @@ entry: ; CHECK-NEXT: s_nop 0 // 0000000001FC: BF800000 ; CHECK-EMPTY: -; CHECK-NEXT: kernel1: +; CHECK-NEXT: : ; CHECK-NEXT: s_endpgm define amdgpu_kernel void @kernel1(i32 addrspace(1)* addrspace(4)* %ptr.out) align 256 { entry: diff --git a/test/CodeGen/AMDGPU/s_code_end.ll b/test/CodeGen/AMDGPU/s_code_end.ll index 0cf2276b239..47ded0ad8c4 100644 --- a/test/CodeGen/AMDGPU/s_code_end.ll +++ b/test/CodeGen/AMDGPU/s_code_end.ll @@ -4,7 +4,7 @@ ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -asm-verbose=0 < %s | FileCheck -check-prefixes=GCN,GCN-ASM,GFX10NOEND,GFX10NOEND-ASM %s ; RUN: llc -mtriple=amdgcn-- -mcpu=gfx1010 -filetype=obj < %s | llvm-objdump -arch=amdgcn -mcpu=gfx1010 -disassemble - | FileCheck -check-prefixes=GCN,GCN-OBJ,GFX10NOEND,GFX10NOEND-OBJ %s -; GCN: a_kernel1: +; GCN: a_kernel1{{>?}}: ; GCN: s_endpgm ; GCN-ASM: [[END_LABEL1:\.Lfunc_end.*]]: ; GCN-ASM-NEXT: .size a_kernel1, [[END_LABEL1]]-a_kernel1 @@ -15,7 +15,7 @@ define amdgpu_kernel void @a_kernel1() { ret void } -; GCN: a_kernel2: +; GCN: a_kernel2{{>?}}: ; GCN: s_endpgm ; GCN-ASM: [[END_LABEL2:\.Lfunc_end.*]]: ; GCN-ASM-NEXT: .size a_kernel2, [[END_LABEL2]]-a_kernel2 @@ -30,7 +30,7 @@ define amdgpu_kernel void @a_kernel2() { ; GCN-ASM-NEXT: .p2align 2 ; GCN-ASM-NEXT: .type a_function,@function -; GCN-NEXT: a_function: +; GCN-NEXT: a_function{{>?}}: ; GCN: s_setpc_b64 ; GCN-ASM-NEXT: [[END_LABEL3:\.Lfunc_end.*]]: ; GCN-ASM-NEXT: .size a_function, [[END_LABEL3]]-a_function diff --git a/test/CodeGen/ARM/Windows/trivial-gnu-object.ll b/test/CodeGen/ARM/Windows/trivial-gnu-object.ll index 2d55f218ddc..06bec29ec3d 100644 --- a/test/CodeGen/ARM/Windows/trivial-gnu-object.ll +++ b/test/CodeGen/ARM/Windows/trivial-gnu-object.ll @@ -4,7 +4,7 @@ define void @foo() { ; CHECK: file format coff-arm -; CHECK-LABEL: foo: +; CHECK-LABEL: : ; CHECK: bx lr ret void } diff --git a/test/CodeGen/ARM/inlineasm-ldr-pseudo.ll b/test/CodeGen/ARM/inlineasm-ldr-pseudo.ll index 98665f056a2..da7134530e8 100644 --- a/test/CodeGen/ARM/inlineasm-ldr-pseudo.ll +++ b/test/CodeGen/ARM/inlineasm-ldr-pseudo.ll @@ -5,7 +5,7 @@ ; demonstrate the bug. Going the asm->obj route does not show the issue. ; RUN: llc -mtriple=arm-none-linux < %s -filetype=obj | llvm-objdump -d - | FileCheck %s ; RUN: llc -mtriple=arm-apple-darwin < %s -filetype=obj | llvm-objdump -d - | FileCheck %s -; CHECK-LABEL: foo: +; CHECK-LABEL: <{{_?}}foo>: ; CHECK: 0: 00 00 9f e5 ldr r0, [pc] ; CHECK: 4: 0e f0 a0 e1 mov pc, lr ; Make sure the constant pool entry comes after the return diff --git a/test/CodeGen/ARM/struct_byval_arm_t1_t2.ll b/test/CodeGen/ARM/struct_byval_arm_t1_t2.ll index de53d91e0d8..819662e7beb 100644 --- a/test/CodeGen/ARM/struct_byval_arm_t1_t2.ll +++ b/test/CodeGen/ARM/struct_byval_arm_t1_t2.ll @@ -53,11 +53,11 @@ declare void @use_M(%struct.M* byval) %struct.N = type { [ 128 x i8 ] } ; 128 bytes declare void @use_N(%struct.N* byval) -;ARM-LABEL: test_A_1: -;THUMB2-LABEL: test_A_1: -;NO_NEON-LABEL:test_A_1: -;THUMB1-LABEL: test_A_1: -;T1POST-LABEL: test_A_1: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_A_1() { ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 @@ -74,11 +74,11 @@ declare void @use_N(%struct.N* byval) call void @use_A(%struct.A* byval align 1 %a) ret void } -;ARM-LABEL: test_A_2: -;THUMB2-LABEL: test_A_2: -;NO_NEON-LABEL:test_A_2: -;THUMB1-LABEL: test_A_2: -;T1POST-LABEL: test_A_2: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_A_2() { ;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2 @@ -95,11 +95,11 @@ declare void @use_N(%struct.N* byval) call void @use_A(%struct.A* byval align 2 %a) ret void } -;ARM-LABEL: test_A_4: -;THUMB2-LABEL: test_A_4: -;NO_NEON-LABEL:test_A_4: -;THUMB1-LABEL: test_A_4: -;T1POST-LABEL: test_A_4: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_A_4() { ;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4 @@ -116,11 +116,11 @@ declare void @use_N(%struct.N* byval) call void @use_A(%struct.A* byval align 4 %a) ret void } -;ARM-LABEL: test_A_8: -;THUMB2-LABEL: test_A_8: -;NO_NEON-LABEL:test_A_8: -;THUMB1-LABEL: test_A_8: -;T1POST-LABEL: test_A_8: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_A_8() { ;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! @@ -138,11 +138,11 @@ declare void @use_N(%struct.N* byval) call void @use_A(%struct.A* byval align 8 %a) ret void } -;ARM-LABEL: test_A_16: -;THUMB2-LABEL: test_A_16: -;NO_NEON-LABEL:test_A_16: -;THUMB1-LABEL: test_A_16: -;T1POST-LABEL: test_A_16: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_A_16() { ;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 @@ -162,11 +162,11 @@ declare void @use_N(%struct.N* byval) call void @use_A(%struct.A* byval align 16 %a) ret void } -;ARM-LABEL: test_B_1: -;THUMB2-LABEL: test_B_1: -;NO_NEON-LABEL:test_B_1: -;THUMB1-LABEL: test_B_1: -;T1POST-LABEL: test_B_1: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_B_1() { ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 @@ -183,11 +183,11 @@ declare void @use_N(%struct.N* byval) call void @use_B(%struct.B* byval align 1 %a) ret void } -;ARM-LABEL: test_B_2: -;THUMB2-LABEL: test_B_2: -;NO_NEON-LABEL:test_B_2: -;THUMB1-LABEL: test_B_2: -;T1POST-LABEL: test_B_2: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_B_2() { ;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 @@ -208,11 +208,11 @@ declare void @use_N(%struct.N* byval) call void @use_B(%struct.B* byval align 2 %a) ret void } -;ARM-LABEL: test_B_4: -;THUMB2-LABEL: test_B_4: -;NO_NEON-LABEL:test_B_4: -;THUMB1-LABEL: test_B_4: -;T1POST-LABEL: test_B_4: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_B_4() { ;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4 ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 @@ -233,11 +233,11 @@ declare void @use_N(%struct.N* byval) call void @use_B(%struct.B* byval align 4 %a) ret void } -;ARM-LABEL: test_B_8: -;THUMB2-LABEL: test_B_8: -;NO_NEON-LABEL:test_B_8: -;THUMB1-LABEL: test_B_8: -;T1POST-LABEL: test_B_8: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_B_8() { ;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 @@ -259,11 +259,11 @@ declare void @use_N(%struct.N* byval) call void @use_B(%struct.B* byval align 8 %a) ret void } -;ARM-LABEL: test_B_16: -;THUMB2-LABEL: test_B_16: -;NO_NEON-LABEL:test_B_16: -;THUMB1-LABEL: test_B_16: -;T1POST-LABEL: test_B_16: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_B_16() { ;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 @@ -285,11 +285,11 @@ declare void @use_N(%struct.N* byval) call void @use_B(%struct.B* byval align 16 %a) ret void } -;ARM-LABEL: test_C_1: -;THUMB2-LABEL: test_C_1: -;NO_NEON-LABEL:test_C_1: -;THUMB1-LABEL: test_C_1: -;T1POST-LABEL: test_C_1: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_C_1() { ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 @@ -306,11 +306,11 @@ declare void @use_N(%struct.N* byval) call void @use_C(%struct.C* byval align 1 %a) ret void } -;ARM-LABEL: test_C_2: -;THUMB2-LABEL: test_C_2: -;NO_NEON-LABEL:test_C_2: -;THUMB1-LABEL: test_C_2: -;T1POST-LABEL: test_C_2: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_C_2() { ;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 @@ -331,11 +331,11 @@ declare void @use_N(%struct.N* byval) call void @use_C(%struct.C* byval align 2 %a) ret void } -;ARM-LABEL: test_C_4: -;THUMB2-LABEL: test_C_4: -;NO_NEON-LABEL:test_C_4: -;THUMB1-LABEL: test_C_4: -;T1POST-LABEL: test_C_4: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_C_4() { ;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4 ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 @@ -357,11 +357,11 @@ declare void @use_N(%struct.N* byval) call void @use_C(%struct.C* byval align 4 %a) ret void } -;ARM-LABEL: test_C_8: -;THUMB2-LABEL: test_C_8: -;NO_NEON-LABEL:test_C_8: -;THUMB1-LABEL: test_C_8: -;T1POST-LABEL: test_C_8: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_C_8() { ;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 @@ -384,11 +384,11 @@ declare void @use_N(%struct.N* byval) call void @use_C(%struct.C* byval align 8 %a) ret void } -;ARM-LABEL: test_C_16: -;THUMB2-LABEL: test_C_16: -;NO_NEON-LABEL:test_C_16: -;THUMB1-LABEL: test_C_16: -;T1POST-LABEL: test_C_16: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_C_16() { ;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 @@ -411,11 +411,11 @@ declare void @use_N(%struct.N* byval) call void @use_C(%struct.C* byval align 16 %a) ret void } -;ARM-LABEL: test_D_1: -;THUMB2-LABEL: test_D_1: -;NO_NEON-LABEL:test_D_1: -;THUMB1-LABEL: test_D_1: -;T1POST-LABEL: test_D_1: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_D_1() { ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;ARM: bne @@ -436,11 +436,11 @@ declare void @use_N(%struct.N* byval) call void @use_D(%struct.D* byval align 1 %a) ret void } -;ARM-LABEL: test_D_2: -;THUMB2-LABEL: test_D_2: -;NO_NEON-LABEL:test_D_2: -;THUMB1-LABEL: test_D_2: -;T1POST-LABEL: test_D_2: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_D_2() { ;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;ARM: bne @@ -461,11 +461,11 @@ declare void @use_N(%struct.N* byval) call void @use_D(%struct.D* byval align 2 %a) ret void } -;ARM-LABEL: test_D_4: -;THUMB2-LABEL: test_D_4: -;NO_NEON-LABEL:test_D_4: -;THUMB1-LABEL: test_D_4: -;T1POST-LABEL: test_D_4: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_D_4() { ;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4 ;ARM: bne @@ -486,11 +486,11 @@ declare void @use_N(%struct.N* byval) call void @use_D(%struct.D* byval align 4 %a) ret void } -;ARM-LABEL: test_D_8: -;THUMB2-LABEL: test_D_8: -;NO_NEON-LABEL:test_D_8: -;THUMB1-LABEL: test_D_8: -;T1POST-LABEL: test_D_8: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_D_8() { ;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;ARM: bne @@ -512,11 +512,11 @@ declare void @use_N(%struct.N* byval) call void @use_D(%struct.D* byval align 8 %a) ret void } -;ARM-LABEL: test_D_16: -;THUMB2-LABEL: test_D_16: -;NO_NEON-LABEL:test_D_16: -;THUMB1-LABEL: test_D_16: -;T1POST-LABEL: test_D_16: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_D_16() { ;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;ARM: bne @@ -538,11 +538,11 @@ declare void @use_N(%struct.N* byval) call void @use_D(%struct.D* byval align 16 %a) ret void } -;ARM-LABEL: test_E_1: -;THUMB2-LABEL: test_E_1: -;NO_NEON-LABEL:test_E_1: -;THUMB1-LABEL: test_E_1: -;T1POST-LABEL: test_E_1: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_E_1() { ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;ARM: bne @@ -563,11 +563,11 @@ declare void @use_N(%struct.N* byval) call void @use_E(%struct.E* byval align 1 %a) ret void } -;ARM-LABEL: test_E_2: -;THUMB2-LABEL: test_E_2: -;NO_NEON-LABEL:test_E_2: -;THUMB1-LABEL: test_E_2: -;T1POST-LABEL: test_E_2: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_E_2() { ;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;ARM: bne @@ -592,11 +592,11 @@ declare void @use_N(%struct.N* byval) call void @use_E(%struct.E* byval align 2 %a) ret void } -;ARM-LABEL: test_E_4: -;THUMB2-LABEL: test_E_4: -;NO_NEON-LABEL:test_E_4: -;THUMB1-LABEL: test_E_4: -;T1POST-LABEL: test_E_4: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_E_4() { ;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4 ;ARM: bne @@ -621,11 +621,11 @@ declare void @use_N(%struct.N* byval) call void @use_E(%struct.E* byval align 4 %a) ret void } -;ARM-LABEL: test_E_8: -;THUMB2-LABEL: test_E_8: -;NO_NEON-LABEL:test_E_8: -;THUMB1-LABEL: test_E_8: -;T1POST-LABEL: test_E_8: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_E_8() { ;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;ARM: bne @@ -651,11 +651,11 @@ declare void @use_N(%struct.N* byval) call void @use_E(%struct.E* byval align 8 %a) ret void } -;ARM-LABEL: test_E_16: -;THUMB2-LABEL: test_E_16: -;NO_NEON-LABEL:test_E_16: -;THUMB1-LABEL: test_E_16: -;T1POST-LABEL: test_E_16: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_E_16() { ;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;ARM: bne @@ -681,11 +681,11 @@ declare void @use_N(%struct.N* byval) call void @use_E(%struct.E* byval align 16 %a) ret void } -;ARM-LABEL: test_F_1: -;THUMB2-LABEL: test_F_1: -;NO_NEON-LABEL:test_F_1: -;THUMB1-LABEL: test_F_1: -;T1POST-LABEL: test_F_1: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_F_1() { ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;ARM: bne @@ -706,11 +706,11 @@ declare void @use_N(%struct.N* byval) call void @use_F(%struct.F* byval align 1 %a) ret void } -;ARM-LABEL: test_F_2: -;THUMB2-LABEL: test_F_2: -;NO_NEON-LABEL:test_F_2: -;THUMB1-LABEL: test_F_2: -;T1POST-LABEL: test_F_2: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_F_2() { ;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;ARM: bne @@ -735,11 +735,11 @@ declare void @use_N(%struct.N* byval) call void @use_F(%struct.F* byval align 2 %a) ret void } -;ARM-LABEL: test_F_4: -;THUMB2-LABEL: test_F_4: -;NO_NEON-LABEL:test_F_4: -;THUMB1-LABEL: test_F_4: -;T1POST-LABEL: test_F_4: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_F_4() { ;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4 ;ARM: bne @@ -765,11 +765,11 @@ declare void @use_N(%struct.N* byval) call void @use_F(%struct.F* byval align 4 %a) ret void } -;ARM-LABEL: test_F_8: -;THUMB2-LABEL: test_F_8: -;NO_NEON-LABEL:test_F_8: -;THUMB1-LABEL: test_F_8: -;T1POST-LABEL: test_F_8: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_F_8() { ;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;ARM: bne @@ -796,11 +796,11 @@ declare void @use_N(%struct.N* byval) call void @use_F(%struct.F* byval align 8 %a) ret void } -;ARM-LABEL: test_F_16: -;THUMB2-LABEL: test_F_16: -;NO_NEON-LABEL:test_F_16: -;THUMB1-LABEL: test_F_16: -;T1POST-LABEL: test_F_16: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_F_16() { ;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;ARM: bne @@ -827,11 +827,11 @@ declare void @use_N(%struct.N* byval) call void @use_F(%struct.F* byval align 16 %a) ret void } -;ARM-LABEL: test_G_1: -;THUMB2-LABEL: test_G_1: -;NO_NEON-LABEL:test_G_1: -;THUMB1-LABEL: test_G_1: -;T1POST-LABEL: test_G_1: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_G_1() { ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 @@ -848,11 +848,11 @@ declare void @use_N(%struct.N* byval) call void @use_G(%struct.G* byval align 1 %a) ret void } -;ARM-LABEL: test_G_2: -;THUMB2-LABEL: test_G_2: -;NO_NEON-LABEL:test_G_2: -;THUMB1-LABEL: test_G_2: -;T1POST-LABEL: test_G_2: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_G_2() { ;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2 @@ -869,11 +869,11 @@ declare void @use_N(%struct.N* byval) call void @use_G(%struct.G* byval align 2 %a) ret void } -;ARM-LABEL: test_G_4: -;THUMB2-LABEL: test_G_4: -;NO_NEON-LABEL:test_G_4: -;THUMB1-LABEL: test_G_4: -;T1POST-LABEL: test_G_4: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_G_4() { ;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4 @@ -890,11 +890,11 @@ declare void @use_N(%struct.N* byval) call void @use_G(%struct.G* byval align 4 %a) ret void } -;ARM-LABEL: test_G_8: -;THUMB2-LABEL: test_G_8: -;NO_NEON-LABEL:test_G_8: -;THUMB1-LABEL: test_G_8: -;T1POST-LABEL: test_G_8: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_G_8() { ;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! @@ -912,11 +912,11 @@ declare void @use_N(%struct.N* byval) call void @use_G(%struct.G* byval align 8 %a) ret void } -;ARM-LABEL: test_G_16: -;THUMB2-LABEL: test_G_16: -;NO_NEON-LABEL:test_G_16: -;THUMB1-LABEL: test_G_16: -;T1POST-LABEL: test_G_16: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_G_16() { ;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! @@ -934,11 +934,11 @@ declare void @use_N(%struct.N* byval) call void @use_G(%struct.G* byval align 16 %a) ret void } -;ARM-LABEL: test_H_1: -;THUMB2-LABEL: test_H_1: -;NO_NEON-LABEL:test_H_1: -;THUMB1-LABEL: test_H_1: -;T1POST-LABEL: test_H_1: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_H_1() { ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 @@ -955,11 +955,11 @@ declare void @use_N(%struct.N* byval) call void @use_H(%struct.H* byval align 1 %a) ret void } -;ARM-LABEL: test_H_2: -;THUMB2-LABEL: test_H_2: -;NO_NEON-LABEL:test_H_2: -;THUMB1-LABEL: test_H_2: -;T1POST-LABEL: test_H_2: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_H_2() { ;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2 @@ -976,11 +976,11 @@ declare void @use_N(%struct.N* byval) call void @use_H(%struct.H* byval align 2 %a) ret void } -;ARM-LABEL: test_H_4: -;THUMB2-LABEL: test_H_4: -;NO_NEON-LABEL:test_H_4: -;THUMB1-LABEL: test_H_4: -;T1POST-LABEL: test_H_4: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_H_4() { ;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4 @@ -997,11 +997,11 @@ declare void @use_N(%struct.N* byval) call void @use_H(%struct.H* byval align 4 %a) ret void } -;ARM-LABEL: test_H_8: -;THUMB2-LABEL: test_H_8: -;NO_NEON-LABEL:test_H_8: -;THUMB1-LABEL: test_H_8: -;T1POST-LABEL: test_H_8: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_H_8() { ;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! @@ -1019,11 +1019,11 @@ declare void @use_N(%struct.N* byval) call void @use_H(%struct.H* byval align 8 %a) ret void } -;ARM-LABEL: test_H_16: -;THUMB2-LABEL: test_H_16: -;NO_NEON-LABEL:test_H_16: -;THUMB1-LABEL: test_H_16: -;T1POST-LABEL: test_H_16: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_H_16() { ;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! @@ -1041,11 +1041,11 @@ declare void @use_N(%struct.N* byval) call void @use_H(%struct.H* byval align 16 %a) ret void } -;ARM-LABEL: test_I_1: -;THUMB2-LABEL: test_I_1: -;NO_NEON-LABEL:test_I_1: -;THUMB1-LABEL: test_I_1: -;T1POST-LABEL: test_I_1: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_I_1() { ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 @@ -1062,11 +1062,11 @@ declare void @use_N(%struct.N* byval) call void @use_I(%struct.I* byval align 1 %a) ret void } -;ARM-LABEL: test_I_2: -;THUMB2-LABEL: test_I_2: -;NO_NEON-LABEL:test_I_2: -;THUMB1-LABEL: test_I_2: -;T1POST-LABEL: test_I_2: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_I_2() { ;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2 @@ -1083,11 +1083,11 @@ declare void @use_N(%struct.N* byval) call void @use_I(%struct.I* byval align 2 %a) ret void } -;ARM-LABEL: test_I_4: -;THUMB2-LABEL: test_I_4: -;NO_NEON-LABEL:test_I_4: -;THUMB1-LABEL: test_I_4: -;T1POST-LABEL: test_I_4: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_I_4() { ;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4 @@ -1104,11 +1104,11 @@ declare void @use_N(%struct.N* byval) call void @use_I(%struct.I* byval align 4 %a) ret void } -;ARM-LABEL: test_I_8: -;THUMB2-LABEL: test_I_8: -;NO_NEON-LABEL:test_I_8: -;THUMB1-LABEL: test_I_8: -;T1POST-LABEL: test_I_8: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_I_8() { ;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! @@ -1126,11 +1126,11 @@ declare void @use_N(%struct.N* byval) call void @use_I(%struct.I* byval align 8 %a) ret void } -;ARM-LABEL: test_I_16: -;THUMB2-LABEL: test_I_16: -;NO_NEON-LABEL:test_I_16: -;THUMB1-LABEL: test_I_16: -;T1POST-LABEL: test_I_16: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_I_16() { ;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! @@ -1148,11 +1148,11 @@ declare void @use_N(%struct.N* byval) call void @use_I(%struct.I* byval align 16 %a) ret void } -;ARM-LABEL: test_J_1: -;THUMB2-LABEL: test_J_1: -;NO_NEON-LABEL:test_J_1: -;THUMB1-LABEL: test_J_1: -;T1POST-LABEL: test_J_1: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_J_1() { ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;ARM: bne @@ -1173,11 +1173,11 @@ declare void @use_N(%struct.N* byval) call void @use_J(%struct.J* byval align 1 %a) ret void } -;ARM-LABEL: test_J_2: -;THUMB2-LABEL: test_J_2: -;NO_NEON-LABEL:test_J_2: -;THUMB1-LABEL: test_J_2: -;T1POST-LABEL: test_J_2: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_J_2() { ;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;ARM: bne @@ -1198,11 +1198,11 @@ declare void @use_N(%struct.N* byval) call void @use_J(%struct.J* byval align 2 %a) ret void } -;ARM-LABEL: test_J_4: -;THUMB2-LABEL: test_J_4: -;NO_NEON-LABEL:test_J_4: -;THUMB1-LABEL: test_J_4: -;T1POST-LABEL: test_J_4: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_J_4() { ;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4 ;ARM: bne @@ -1223,11 +1223,11 @@ declare void @use_N(%struct.N* byval) call void @use_J(%struct.J* byval align 4 %a) ret void } -;ARM-LABEL: test_J_8: -;THUMB2-LABEL: test_J_8: -;NO_NEON-LABEL:test_J_8: -;THUMB1-LABEL: test_J_8: -;T1POST-LABEL: test_J_8: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_J_8() { ;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;ARM: bne @@ -1249,11 +1249,11 @@ declare void @use_N(%struct.N* byval) call void @use_J(%struct.J* byval align 8 %a) ret void } -;ARM-LABEL: test_J_16: -;THUMB2-LABEL: test_J_16: -;NO_NEON-LABEL:test_J_16: -;THUMB1-LABEL: test_J_16: -;T1POST-LABEL: test_J_16: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_J_16() { ;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;ARM: bne @@ -1275,11 +1275,11 @@ declare void @use_N(%struct.N* byval) call void @use_J(%struct.J* byval align 16 %a) ret void } -;ARM-LABEL: test_K_1: -;THUMB2-LABEL: test_K_1: -;NO_NEON-LABEL:test_K_1: -;THUMB1-LABEL: test_K_1: -;T1POST-LABEL: test_K_1: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_K_1() { ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;ARM: bne @@ -1300,11 +1300,11 @@ declare void @use_N(%struct.N* byval) call void @use_K(%struct.K* byval align 1 %a) ret void } -;ARM-LABEL: test_K_2: -;THUMB2-LABEL: test_K_2: -;NO_NEON-LABEL:test_K_2: -;THUMB1-LABEL: test_K_2: -;T1POST-LABEL: test_K_2: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_K_2() { ;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;ARM: bne @@ -1325,11 +1325,11 @@ declare void @use_N(%struct.N* byval) call void @use_K(%struct.K* byval align 2 %a) ret void } -;ARM-LABEL: test_K_4: -;THUMB2-LABEL: test_K_4: -;NO_NEON-LABEL:test_K_4: -;THUMB1-LABEL: test_K_4: -;T1POST-LABEL: test_K_4: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_K_4() { ;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4 ;ARM: bne @@ -1350,11 +1350,11 @@ declare void @use_N(%struct.N* byval) call void @use_K(%struct.K* byval align 4 %a) ret void } -;ARM-LABEL: test_K_8: -;THUMB2-LABEL: test_K_8: -;NO_NEON-LABEL:test_K_8: -;THUMB1-LABEL: test_K_8: -;T1POST-LABEL: test_K_8: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_K_8() { ;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;ARM: bne @@ -1376,11 +1376,11 @@ declare void @use_N(%struct.N* byval) call void @use_K(%struct.K* byval align 8 %a) ret void } -;ARM-LABEL: test_K_16: -;THUMB2-LABEL: test_K_16: -;NO_NEON-LABEL:test_K_16: -;THUMB1-LABEL: test_K_16: -;T1POST-LABEL: test_K_16: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_K_16() { ;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;ARM: bne @@ -1402,11 +1402,11 @@ declare void @use_N(%struct.N* byval) call void @use_K(%struct.K* byval align 16 %a) ret void } -;ARM-LABEL: test_L_1: -;THUMB2-LABEL: test_L_1: -;NO_NEON-LABEL:test_L_1: -;THUMB1-LABEL: test_L_1: -;T1POST-LABEL: test_L_1: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_L_1() { ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;ARM: bne @@ -1427,11 +1427,11 @@ declare void @use_N(%struct.N* byval) call void @use_L(%struct.L* byval align 1 %a) ret void } -;ARM-LABEL: test_L_2: -;THUMB2-LABEL: test_L_2: -;NO_NEON-LABEL:test_L_2: -;THUMB1-LABEL: test_L_2: -;T1POST-LABEL: test_L_2: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_L_2() { ;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;ARM: bne @@ -1452,11 +1452,11 @@ declare void @use_N(%struct.N* byval) call void @use_L(%struct.L* byval align 2 %a) ret void } -;ARM-LABEL: test_L_4: -;THUMB2-LABEL: test_L_4: -;NO_NEON-LABEL:test_L_4: -;THUMB1-LABEL: test_L_4: -;T1POST-LABEL: test_L_4: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_L_4() { ;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4 ;ARM: bne @@ -1477,11 +1477,11 @@ declare void @use_N(%struct.N* byval) call void @use_L(%struct.L* byval align 4 %a) ret void } -;ARM-LABEL: test_L_8: -;THUMB2-LABEL: test_L_8: -;NO_NEON-LABEL:test_L_8: -;THUMB1-LABEL: test_L_8: -;T1POST-LABEL: test_L_8: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_L_8() { ;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;ARM: bne @@ -1503,11 +1503,11 @@ declare void @use_N(%struct.N* byval) call void @use_L(%struct.L* byval align 8 %a) ret void } -;ARM-LABEL: test_L_16: -;THUMB2-LABEL: test_L_16: -;NO_NEON-LABEL:test_L_16: -;THUMB1-LABEL: test_L_16: -;T1POST-LABEL: test_L_16: +;ARM-LABEL: : +;THUMB2-LABEL: : +;NO_NEON-LABEL:: +;THUMB1-LABEL: : +;T1POST-LABEL: : define void @test_L_16() { ;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;ARM: bne @@ -1529,7 +1529,7 @@ declare void @use_N(%struct.N* byval) call void @use_L(%struct.L* byval align 16 %a) ret void } -;V8MBASE-LABEL: test_M: +;V8MBASE-LABEL: : define void @test_M() { ;V8MBASE: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} @@ -1540,7 +1540,7 @@ declare void @use_N(%struct.N* byval) call void @use_M(%struct.M* byval align 1 %a) ret void } -;V8MBASE-LABEL: test_N: +;V8MBASE-LABEL: : define void @test_N() { ;V8MBASE: movw r{{[0-9]+}}, #{{[0-9]+}} diff --git a/test/CodeGen/ARM/thumb1-varalloc.ll b/test/CodeGen/ARM/thumb1-varalloc.ll index 0e8b6c09896..8d56fe1da90 100644 --- a/test/CodeGen/ARM/thumb1-varalloc.ll +++ b/test/CodeGen/ARM/thumb1-varalloc.ll @@ -9,7 +9,7 @@ ; rdar://8819685 define i8* @_foo() { entry: -; CHECK-LABEL: foo: +; CHECK-LABEL: __foo{{>?}}: %size = alloca i32, align 4 %0 = load i8*, i8** @__bar, align 4 @@ -46,7 +46,7 @@ declare i32 @_called_func(i8*, i32*) nounwind ; Simple variable ending up *at* sp. define void @test_simple_var() { -; CHECK-LABEL: test_simple_var: +; CHECK-LABEL: test_simple_var{{>?}}: %addr32 = alloca i32 %addr8 = bitcast i32* %addr32 to i8* @@ -60,7 +60,7 @@ define void @test_simple_var() { ; Simple variable ending up at aligned offset from sp. define void @test_local_var_addr_aligned() { -; CHECK-LABEL: test_local_var_addr_aligned: +; CHECK-LABEL: test_local_var_addr_aligned{{>?}}: %addr1.32 = alloca i32 %addr1 = bitcast i32* %addr1.32 to i8* @@ -81,7 +81,7 @@ define void @test_local_var_addr_aligned() { ; Simple variable ending up at aligned offset from sp. define void @test_local_var_big_offset() { -; CHECK-LABEL: test_local_var_big_offset: +; CHECK-LABEL: test_local_var_big_offset{{>?}}: %addr1.32 = alloca i32, i32 257 %addr1 = bitcast i32* %addr1.32 to i8* %addr2.32 = alloca i32, i32 257 diff --git a/test/CodeGen/ARM/wrong-t2stmia-size-opt.ll b/test/CodeGen/ARM/wrong-t2stmia-size-opt.ll index fe335df7a1a..252e98bf4e7 100644 --- a/test/CodeGen/ARM/wrong-t2stmia-size-opt.ll +++ b/test/CodeGen/ARM/wrong-t2stmia-size-opt.ll @@ -20,5 +20,5 @@ define i32* @wrong-t2stmia-size-reduction(i32* %addr, i32 %val0, i32 %val1) mins ; Check that stm writes three registers. The bug caused one of registers (LR, ; which invalid for Thumb1 form of STMIA instruction) to be dropped. -; CHECK-LABEL: wrong-t2stmia-size-reduction: +; CHECK-LABEL: : ; CHECK: stm{{[^,]*}}, {{{.*,.*,.*}}} diff --git a/test/CodeGen/BPF/objdump_cond_op.ll b/test/CodeGen/BPF/objdump_cond_op.ll index b9dc122fe20..d6f575f1a6a 100644 --- a/test/CodeGen/BPF/objdump_cond_op.ll +++ b/test/CodeGen/BPF/objdump_cond_op.ll @@ -44,7 +44,7 @@ define i32 @test(i32, i32) local_unnamed_addr #0 { %12 = shl nsw i32 %10, 2 br label %13 -; CHECK-LABEL: LBB0_2: +; CHECK-LABEL: : ; CHECK: r3 = 0 ll ; CHECK: r0 = *(u32 *)(r3 + 0) ; CHECK: r2 <<= 32 @@ -56,14 +56,14 @@ define i32 @test(i32, i32) local_unnamed_addr #0 { %14 = phi i32 [ %12, %11 ], [ %7, %4 ] store i32 %14, i32* @gbl, align 4 br label %15 -; CHECK-LABEL: LBB0_4: +; CHECK-LABEL: : ; CHECK: r1 = 0 ll ; CHECK: *(u32 *)(r1 + 0) = r0 ;