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[AVX-512] Add VMOV64toSDZrm CodeGenOnly instruction based on the same instruction from AVX/SSE.
I can't prove that we can select this instruction or the AVX/SSE version, but I'm adding it for consistency for now so I can continue matching the load folding tables. llvm-svn: 294907
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@ -3070,6 +3070,10 @@ def VMOV64toSDZrr : AVX512BI<0x6E, MRMSrcReg, (outs FR64X:$dst), (ins GR64:$src)
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"vmovq\t{$src, $dst|$dst, $src}",
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"vmovq\t{$src, $dst|$dst, $src}",
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[(set FR64X:$dst, (bitconvert GR64:$src))],
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[(set FR64X:$dst, (bitconvert GR64:$src))],
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IIC_SSE_MOVDQ>, EVEX, VEX_W, Sched<[WriteMove]>;
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IIC_SSE_MOVDQ>, EVEX, VEX_W, Sched<[WriteMove]>;
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def VMOV64toSDZrm : AVX512XSI<0x7E, MRMSrcMem, (outs FR64X:$dst), (ins i64mem:$src),
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"vmovq\t{$src, $dst|$dst, $src}",
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[(set FR64X:$dst, (bitconvert (loadi64 addr:$src)))]>,
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EVEX, VEX_W, EVEX_CD8<8, CD8VT8>;
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def VMOVSDto64Zrr : AVX512BI<0x7E, MRMDestReg, (outs GR64:$dst), (ins FR64X:$src),
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def VMOVSDto64Zrr : AVX512BI<0x7E, MRMDestReg, (outs GR64:$dst), (ins FR64X:$src),
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"vmovq\t{$src, $dst|$dst, $src}",
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"vmovq\t{$src, $dst|$dst, $src}",
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[(set GR64:$dst, (bitconvert FR64X:$src))],
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[(set GR64:$dst, (bitconvert FR64X:$src))],
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