From 25ce484c2734da82cd567004960ff33dd7c88e49 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 26 Aug 2005 23:42:05 +0000 Subject: [PATCH] The condition register being branched on may not be cr0, as such, print it. This fixes: UnitTests/2005-07-17-INT-To-FP.c llvm-svn: 23112 --- lib/Target/PowerPC/PowerPCInstrInfo.td | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/lib/Target/PowerPC/PowerPCInstrInfo.td b/lib/Target/PowerPC/PowerPCInstrInfo.td index 4f88cd35c59..026d0ed0b2f 100644 --- a/lib/Target/PowerPC/PowerPCInstrInfo.td +++ b/lib/Target/PowerPC/PowerPCInstrInfo.td @@ -88,17 +88,17 @@ let isBranch = 1, isTerminator = 1 in { // FIXME: 4*CR# needs to be added to the BI field! // This will only work for CR0 as it stands now def BLT : BForm<16, 0, 0, 12, 0, (ops CRRC:$crS, target:$block), - "blt $block">; + "blt $crS, $block">; def BLE : BForm<16, 0, 0, 4, 1, (ops CRRC:$crS, target:$block), - "ble $block">; + "ble $crS, $block">; def BEQ : BForm<16, 0, 0, 12, 2, (ops CRRC:$crS, target:$block), - "beq $block">; + "beq $crS, $block">; def BGE : BForm<16, 0, 0, 4, 0, (ops CRRC:$crS, target:$block), - "bge $block">; + "bge $crS, $block">; def BGT : BForm<16, 0, 0, 12, 1, (ops CRRC:$crS, target:$block), - "bgt $block">; + "bgt $crS, $block">; def BNE : BForm<16, 0, 0, 4, 2, (ops CRRC:$crS, target:$block), - "bne $block">; + "bne $crS, $block">; } let isCall = 1,