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[DAG] Move canFoldInAddressingMode before foldBinOpIntoSelect. NFC.
Reduces the diff in D90113.
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7df4051e58
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@ -2022,6 +2022,62 @@ static ConstantSDNode *getAsNonOpaqueConstant(SDValue N) {
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return Const != nullptr && !Const->isOpaque() ? Const : nullptr;
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}
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/// Return true if 'Use' is a load or a store that uses N as its base pointer
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/// and that N may be folded in the load / store addressing mode.
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static bool canFoldInAddressingMode(SDNode *N, SDNode *Use, SelectionDAG &DAG,
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const TargetLowering &TLI) {
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EVT VT;
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unsigned AS;
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if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Use)) {
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if (LD->isIndexed() || LD->getBasePtr().getNode() != N)
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return false;
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VT = LD->getMemoryVT();
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AS = LD->getAddressSpace();
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} else if (StoreSDNode *ST = dyn_cast<StoreSDNode>(Use)) {
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if (ST->isIndexed() || ST->getBasePtr().getNode() != N)
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return false;
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VT = ST->getMemoryVT();
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AS = ST->getAddressSpace();
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} else if (MaskedLoadSDNode *LD = dyn_cast<MaskedLoadSDNode>(Use)) {
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if (LD->isIndexed() || LD->getBasePtr().getNode() != N)
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return false;
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VT = LD->getMemoryVT();
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AS = LD->getAddressSpace();
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} else if (MaskedStoreSDNode *ST = dyn_cast<MaskedStoreSDNode>(Use)) {
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if (ST->isIndexed() || ST->getBasePtr().getNode() != N)
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return false;
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VT = ST->getMemoryVT();
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AS = ST->getAddressSpace();
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} else
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return false;
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TargetLowering::AddrMode AM;
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if (N->getOpcode() == ISD::ADD) {
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AM.HasBaseReg = true;
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ConstantSDNode *Offset = dyn_cast<ConstantSDNode>(N->getOperand(1));
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if (Offset)
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// [reg +/- imm]
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AM.BaseOffs = Offset->getSExtValue();
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else
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// [reg +/- reg]
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AM.Scale = 1;
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} else if (N->getOpcode() == ISD::SUB) {
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AM.HasBaseReg = true;
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ConstantSDNode *Offset = dyn_cast<ConstantSDNode>(N->getOperand(1));
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if (Offset)
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// [reg +/- imm]
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AM.BaseOffs = -Offset->getSExtValue();
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else
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// [reg +/- reg]
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AM.Scale = 1;
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} else
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return false;
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return TLI.isLegalAddressingMode(DAG.getDataLayout(), AM,
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VT.getTypeForEVT(*DAG.getContext()), AS);
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}
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SDValue DAGCombiner::foldBinOpIntoSelect(SDNode *BO) {
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assert(TLI.isBinOp(BO->getOpcode()) && BO->getNumValues() == 1 &&
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"Unexpected binary operator");
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@ -14372,63 +14428,6 @@ SDValue DAGCombiner::visitBR_CC(SDNode *N) {
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return SDValue();
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}
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/// Return true if 'Use' is a load or a store that uses N as its base pointer
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/// and that N may be folded in the load / store addressing mode.
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static bool canFoldInAddressingMode(SDNode *N, SDNode *Use,
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SelectionDAG &DAG,
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const TargetLowering &TLI) {
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EVT VT;
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unsigned AS;
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if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Use)) {
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if (LD->isIndexed() || LD->getBasePtr().getNode() != N)
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return false;
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VT = LD->getMemoryVT();
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AS = LD->getAddressSpace();
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} else if (StoreSDNode *ST = dyn_cast<StoreSDNode>(Use)) {
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if (ST->isIndexed() || ST->getBasePtr().getNode() != N)
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return false;
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VT = ST->getMemoryVT();
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AS = ST->getAddressSpace();
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} else if (MaskedLoadSDNode *LD = dyn_cast<MaskedLoadSDNode>(Use)) {
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if (LD->isIndexed() || LD->getBasePtr().getNode() != N)
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return false;
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VT = LD->getMemoryVT();
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AS = LD->getAddressSpace();
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} else if (MaskedStoreSDNode *ST = dyn_cast<MaskedStoreSDNode>(Use)) {
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if (ST->isIndexed() || ST->getBasePtr().getNode() != N)
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return false;
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VT = ST->getMemoryVT();
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AS = ST->getAddressSpace();
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} else
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return false;
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TargetLowering::AddrMode AM;
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if (N->getOpcode() == ISD::ADD) {
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AM.HasBaseReg = true;
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ConstantSDNode *Offset = dyn_cast<ConstantSDNode>(N->getOperand(1));
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if (Offset)
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// [reg +/- imm]
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AM.BaseOffs = Offset->getSExtValue();
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else
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// [reg +/- reg]
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AM.Scale = 1;
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} else if (N->getOpcode() == ISD::SUB) {
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AM.HasBaseReg = true;
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ConstantSDNode *Offset = dyn_cast<ConstantSDNode>(N->getOperand(1));
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if (Offset)
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// [reg +/- imm]
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AM.BaseOffs = -Offset->getSExtValue();
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else
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// [reg +/- reg]
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AM.Scale = 1;
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} else
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return false;
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return TLI.isLegalAddressingMode(DAG.getDataLayout(), AM,
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VT.getTypeForEVT(*DAG.getContext()), AS);
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}
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static bool getCombineLoadStoreParts(SDNode *N, unsigned Inc, unsigned Dec,
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bool &IsLoad, bool &IsMasked, SDValue &Ptr,
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const TargetLowering &TLI) {
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