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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 20:23:11 +01:00

[X86] Use mtriple instead of march in MIR tests

This commit is contained in:
Simon Pilgrim 2020-10-26 15:20:14 +00:00
parent 4f90b31115
commit 260990f87d
4 changed files with 4 additions and 4 deletions

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@ -1,4 +1,4 @@
# RUN: llc -run-pass opt-phis -march=x86-64 -o - %s | FileCheck %s
# RUN: llc -run-pass opt-phis -mtriple=x86_64-- -o - %s | FileCheck %s
--- |
define void @test() {
ret void

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@ -1,4 +1,4 @@
# RUN: llc -run-pass opt-phis -march=x86-64 -o - %s | FileCheck %s
# RUN: llc -run-pass opt-phis -mtriple=x86_64-- -o - %s | FileCheck %s
# All PHIs should be removed since they can be securely replaced
# by %8 register.
# CHECK-NOT: PHI

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@ -1,4 +1,4 @@
# RUN: llc -march=x86-64 %s -o - -run-pass=processimpdefs -run-pass=unreachable-mbb-elimination | FileCheck %s
# RUN: llc -mtriple=x86_64-- %s -o - -run-pass=processimpdefs -run-pass=unreachable-mbb-elimination | FileCheck %s
---
name: f
tracksRegLiveness: true

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@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=x86-64 -mattr=+x87 -mattr=-sse -run-pass none -o - %s | FileCheck %s
# RUN: llc -mtriple=x86_64-- -mattr=+x87 -mattr=-sse -run-pass none -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the x87 fpsw and fpcw regs
--- |