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Two coalescer fixes in one.
1. Use the same value# to represent unknown values being merged into sub-registers. 2. When coalescer commute an instruction and the destination is a physical register, update its sub-registers by merging in the extended ranges. llvm-svn: 66610
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@ -212,6 +212,10 @@ namespace llvm {
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return VNI;
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}
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/// getUnknownValNo - Find a value# for unknown values, if there isn't one
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/// create a new one.
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VNInfo *getUnknownValNo(BumpPtrAllocator &VNInfoAllocator);
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/// addKill - Add a kill instruction index to the specified value
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/// number.
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static void addKill(VNInfo *VNI, unsigned KillIdx) {
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@ -296,6 +300,11 @@ namespace llvm {
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void MergeInClobberRanges(const LiveInterval &Clobbers,
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BumpPtrAllocator &VNInfoAllocator);
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/// MergeInClobberRange - Same as MergeInClobberRanges except it merge in a
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/// single LiveRange only.
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void MergeInClobberRange(unsigned Start, unsigned End,
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BumpPtrAllocator &VNInfoAllocator);
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/// MergeValueInAsValue - Merge all of the live ranges of a specific val#
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/// in RHS into this live interval as the specified value number.
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/// The LiveRanges in RHS are allowed to overlap with LiveRanges in the
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@ -551,6 +551,20 @@ void LiveInterval::MergeValueInAsValue(const LiveInterval &RHS,
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}
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}
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VNInfo *LiveInterval::getUnknownValNo(BumpPtrAllocator &VNInfoAllocator) {
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unsigned i = getNumValNums();
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if (i) {
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do {
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--i;
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VNInfo *VNI = getValNumInfo(i);
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if (VNI->def == ~0U && !VNI->copy &&
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!VNI->hasPHIKill && !VNI->redefByEC && VNI->kills.empty())
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return VNI;
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} while (i != 0);
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}
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return getNextValue(~0U, 0, VNInfoAllocator);
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}
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/// MergeInClobberRanges - For any live ranges that are not defined in the
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/// current interval, but are defined in the Clobbers interval, mark them
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@ -561,8 +575,7 @@ void LiveInterval::MergeInClobberRanges(const LiveInterval &Clobbers,
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// Find a value # to use for the clobber ranges. If there is already a value#
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// for unknown values, use it.
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// FIXME: Use a single sentinal number for these!
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VNInfo *ClobberValNo = getNextValue(~0U, 0, VNInfoAllocator);
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VNInfo *ClobberValNo = getUnknownValNo(VNInfoAllocator);
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iterator IP = begin();
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for (const_iterator I = Clobbers.begin(), E = Clobbers.end(); I != E; ++I) {
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@ -587,6 +600,32 @@ void LiveInterval::MergeInClobberRanges(const LiveInterval &Clobbers,
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}
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}
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void LiveInterval::MergeInClobberRange(unsigned Start, unsigned End,
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BumpPtrAllocator &VNInfoAllocator) {
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// Find a value # to use for the clobber ranges. If there is already a value#
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// for unknown values, use it.
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VNInfo *ClobberValNo = getUnknownValNo(VNInfoAllocator);
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iterator IP = begin();
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IP = std::upper_bound(IP, end(), Start);
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// If the start of this range overlaps with an existing liverange, trim it.
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if (IP != begin() && IP[-1].end > Start) {
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Start = IP[-1].end;
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// Trimmed away the whole range?
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if (Start >= End) return;
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}
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// If the end of this range overlaps with an existing liverange, trim it.
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if (IP != end() && End > IP->start) {
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End = IP->start;
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// If this trimmed away the whole range, ignore it.
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if (Start == End) return;
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}
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// Insert the clobber interval.
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addRangeFrom(LiveRange(Start, End, ClobberValNo), IP);
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}
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/// MergeValueNumberInto - This method is called when two value nubmers
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/// are found to be equivalent. This eliminates V1, replacing all
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/// LiveRanges with the V1 value number with the V2 value number. This can
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@ -193,13 +193,12 @@ bool SimpleRegisterCoalescing::AdjustCopiesBackFrom(LiveInterval &IntA,
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IntB.addRange(LiveRange(FillerStart, FillerEnd, BValNo));
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// If the IntB live range is assigned to a physical register, and if that
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// physreg has aliases,
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// physreg has sub-registers, update their live intervals as well.
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if (TargetRegisterInfo::isPhysicalRegister(IntB.reg)) {
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// Update the liveintervals of sub-registers.
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for (const unsigned *AS = tri_->getSubRegisters(IntB.reg); *AS; ++AS) {
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LiveInterval &AliasLI = li_->getInterval(*AS);
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AliasLI.addRange(LiveRange(FillerStart, FillerEnd,
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AliasLI.getNextValue(FillerStart, 0, li_->getVNInfoAllocator())));
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for (const unsigned *SR = tri_->getSubRegisters(IntB.reg); *SR; ++SR) {
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LiveInterval &SRLI = li_->getInterval(*SR);
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SRLI.addRange(LiveRange(FillerStart, FillerEnd,
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SRLI.getNextValue(FillerStart, 0, li_->getVNInfoAllocator())));
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}
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}
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@ -367,6 +366,9 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA,
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BExtend[ALR->end] = BLR->end;
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// Update uses of IntA of the specific Val# with IntB.
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bool BHasSubRegs = false;
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if (TargetRegisterInfo::isPhysicalRegister(IntB.reg))
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BHasSubRegs = *tri_->getSubRegisters(IntB.reg);
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for (MachineRegisterInfo::use_iterator UI = mri_->use_begin(IntA.reg),
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UE = mri_->use_end(); UI != UE;) {
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MachineOperand &UseMO = UI.getOperand();
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@ -398,6 +400,9 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA,
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const LiveRange *DLR = IntB.getLiveRangeContaining(DefIdx);
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BHasPHIKill |= DLR->valno->hasPHIKill;
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assert(DLR->valno->def == DefIdx);
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if (BHasSubRegs)
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// Don't know how to update sub-register live intervals.
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return false;
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BDeadValNos.push_back(DLR->valno);
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BExtend[DLR->start] = DLR->end;
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JoinedCopies.insert(UseMI);
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@ -435,6 +440,15 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA,
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if (EI != BExtend.end())
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End = EI->second;
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IntB.addRange(LiveRange(AI->start, End, ValNo));
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// If the IntB live range is assigned to a physical register, and if that
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// physreg has sub-registers, update their live intervals as well.
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if (TargetRegisterInfo::isPhysicalRegister(IntB.reg)) {
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for (const unsigned *SR = tri_->getSubRegisters(IntB.reg); *SR; ++SR) {
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LiveInterval &SRLI = li_->getInterval(*SR);
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SRLI.MergeInClobberRange(AI->start, End, li_->getVNInfoAllocator());
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}
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}
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}
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IntB.addKills(ValNo, BKills);
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ValNo->hasPHIKill = BHasPHIKill;
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28
test/CodeGen/X86/2009-03-10-CoalescerBug.ll
Normal file
28
test/CodeGen/X86/2009-03-10-CoalescerBug.ll
Normal file
@ -0,0 +1,28 @@
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; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin
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; rdar://r6661945
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%struct.WINDOW = type { i16, i16, i16, i16, i16, i16, i16, i32, i32, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.ldat*, i16, i16, i32, i32, %struct.WINDOW*, %struct.pdat, i16, %struct.cchar_t }
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%struct.cchar_t = type { i32, [5 x i32] }
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%struct.ldat = type { %struct.cchar_t*, i16, i16, i16 }
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%struct.pdat = type { i16, i16, i16, i16, i16, i16 }
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define i32 @pnoutrefresh(%struct.WINDOW* %win, i32 %pminrow, i32 %pmincol, i32 %sminrow, i32 %smincol, i32 %smaxrow, i32 %smaxcol) nounwind optsize ssp {
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entry:
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%0 = load i16* null, align 4 ; <i16> [#uses=2]
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%1 = icmp sgt i16 0, %0 ; <i1> [#uses=1]
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br i1 %1, label %bb12, label %bb13
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bb12: ; preds = %entry
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%2 = sext i16 %0 to i32 ; <i32> [#uses=1]
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%3 = sub i32 %2, 0 ; <i32> [#uses=1]
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%4 = add i32 %3, %smaxrow ; <i32> [#uses=2]
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%5 = trunc i32 %4 to i16 ; <i16> [#uses=1]
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%6 = add i16 0, %5 ; <i16> [#uses=1]
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br label %bb13
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bb13: ; preds = %bb12, %entry
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%pmaxrow.0 = phi i16 [ %6, %bb12 ], [ 0, %entry ] ; <i16> [#uses=0]
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%smaxrow_addr.0 = phi i32 [ %4, %bb12 ], [ %smaxrow, %entry ] ; <i32> [#uses=1]
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%7 = trunc i32 %smaxrow_addr.0 to i16 ; <i16> [#uses=0]
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ret i32 0
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}
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