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add tests for PR28153

llvm-svn: 273936
This commit is contained in:
Sanjay Patel 2016-06-27 20:28:59 +00:00
parent 7a9f76e68a
commit 26d02081c6

View File

@ -408,3 +408,79 @@ lor.end: ; preds = %lor.rhs, %entry
%div = sdiv i32 %t.0, 2
ret i32 %div
}
; FIXME:
; We can perform the division in the smaller type.
define i32 @shrink(i8 %x) {
; CHECK-LABEL: @shrink(
; CHECK-NEXT: [[CONV:%.*]] = sext i8 %x to i32
; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[CONV]], 127
; CHECK-NEXT: ret i32 [[DIV]]
;
%conv = sext i8 %x to i32
%div = sdiv i32 %conv, 127
ret i32 %div
}
; Division in the smaller type can lead to more optimizations.
define i32 @zap(i8 %x) {
; CHECK-LABEL: @zap(
; CHECK-NEXT: [[CONV:%.*]] = sext i8 %x to i32
; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[CONV]], -128
; CHECK-NEXT: ret i32 [[DIV]]
;
%conv = sext i8 %x to i32
%div = sdiv i32 %conv, -128
ret i32 %div
}
; Splat constant divisors should get the same folds.
define <3 x i32> @shrink_vec(<3 x i8> %x) {
; CHECK-LABEL: @shrink_vec(
; CHECK-NEXT: [[CONV:%.*]] = sext <3 x i8> %x to <3 x i32>
; CHECK-NEXT: [[DIV:%.*]] = sdiv <3 x i32> [[CONV]], <i32 127, i32 127, i32 127>
; CHECK-NEXT: ret <3 x i32> [[DIV]]
;
%conv = sext <3 x i8> %x to <3 x i32>
%div = sdiv <3 x i32> %conv, <i32 127, i32 127, i32 127>
ret <3 x i32> %div
}
define <2 x i32> @zap_vec(<2 x i8> %x) {
; CHECK-LABEL: @zap_vec(
; CHECK-NEXT: [[CONV:%.*]] = sext <2 x i8> %x to <2 x i32>
; CHECK-NEXT: [[DIV:%.*]] = sdiv <2 x i32> [[CONV]], <i32 -128, i32 -128>
; CHECK-NEXT: ret <2 x i32> [[DIV]]
;
%conv = sext <2 x i8> %x to <2 x i32>
%div = sdiv <2 x i32> %conv, <i32 -128, i32 -128>
ret <2 x i32> %div
}
; But we can't do this if the signed constant won't fit in the original type.
define i32 @shrink_no(i8 %x) {
; CHECK-LABEL: @shrink_no(
; CHECK-NEXT: [[CONV:%.*]] = sext i8 %x to i32
; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[CONV]], 128
; CHECK-NEXT: ret i32 [[DIV]]
;
%conv = sext i8 %x to i32
%div = sdiv i32 %conv, 128
ret i32 %div
}
define i32 @shrink_no2(i8 %x) {
; CHECK-LABEL: @shrink_no2(
; CHECK-NEXT: [[CONV:%.*]] = sext i8 %x to i32
; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[CONV]], -129
; CHECK-NEXT: ret i32 [[DIV]]
;
%conv = sext i8 %x to i32
%div = sdiv i32 %conv, -129
ret i32 %div
}