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[PowerPC] Automatically generate vec_buildvector_loadstore.ll . NFC

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llvm-svn: 369703
This commit is contained in:
Amaury Sechet 2019-08-22 20:42:50 +00:00
parent 561cad686e
commit 27c6540453
1 changed files with 15 additions and 3 deletions
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18
test/CodeGen/PowerPC/vec_buildvector_loadstore.ll
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@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-unknown-linux-gnu -mattr=+altivec -disable-ppc-ilp-pref | FileCheck %s
; Formerly this did byte loads and word stores.
@a = external global <16 x i8>
@ -5,8 +6,20 @@
@c = external global <16 x i8>
define void @foo() nounwind ssp {
; CHECK: foo:
; CHECK-NOT: stw
; CHECK-LABEL: foo:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li 3, a@l
; CHECK-NEXT: lis 4, a@ha
; CHECK-NEXT: lvx 2, 4, 3
; CHECK-NEXT: li 3, .LCPI0_0@l
; CHECK-NEXT: lis 4, .LCPI0_0@ha
; CHECK-NEXT: lvx 3, 4, 3
; CHECK-NEXT: vxor 4, 4, 4
; CHECK-NEXT: li 3, c@l
; CHECK-NEXT: lis 4, c@ha
; CHECK-NEXT: vperm 2, 4, 2, 3
; CHECK-NEXT: stvx 2, 4, 3
; CHECK-NEXT: blr
entry:
%tmp0 = load <16 x i8>, <16 x i8>* @a, align 16
%tmp180.i = extractelement <16 x i8> %tmp0, i32 0 ; <i8> [#uses=1]
@ -33,5 +46,4 @@ entry:
return: ; preds = %bb2
ret void
; CHECK: blr
}