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[InstSimplify] add tests for funnel shift intrinsics; NFC

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llvm-svn: 338217
This commit is contained in:
Sanjay Patel 2018-07-29 16:27:17 +00:00
parent a35775300e
commit 27f96cfacf
1 changed files with 66 additions and 10 deletions
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76
test/Transforms/InstSimplify/call.ll
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@ -431,22 +431,78 @@ declare <8 x i32> @llvm.masked.load.v8i32.p0v8i32(<8 x i32>*, i32, <8 x i1>, <8
declare double @llvm.powi.f64(double, i32)
declare <2 x double> @llvm.powi.v2f64(<2 x double>, i32)
define double @constant_fold_powi() nounwind uwtable ssp {
define double @constant_fold_powi() {
; CHECK-LABEL: @constant_fold_powi(
; CHECK-NEXT: entry:
; CHECK-NEXT: ret double 9.000000e+00
;
entry:
%0 = call double @llvm.powi.f64(double 3.00000e+00, i32 2)
ret double %0
%t0 = call double @llvm.powi.f64(double 3.00000e+00, i32 2)
ret double %t0
}
define <2 x double> @constant_fold_powi_vec() nounwind uwtable ssp {
define <2 x double> @constant_fold_powi_vec() {
; CHECK-LABEL: @constant_fold_powi_vec(
; CHECK-NEXT: entry:
; CHECK-NEXT: ret <2 x double> <double 9.000000e+00, double 2.500000e+01>
;
entry:
%0 = call <2 x double> @llvm.powi.v2f64(<2 x double> <double 3.00000e+00, double 5.00000e+00>, i32 2)
ret <2 x double> %0
%t0 = call <2 x double> @llvm.powi.v2f64(<2 x double> <double 3.00000e+00, double 5.00000e+00>, i32 2)
ret <2 x double> %t0
}
declare i8 @llvm.fshl.i8(i8, i8, i8)
declare i9 @llvm.fshr.i9(i9, i9, i9)
declare <2 x i7> @llvm.fshl.v2i7(<2 x i7>, <2 x i7>, <2 x i7>)
declare <2 x i8> @llvm.fshr.v2i8(<2 x i8>, <2 x i8>, <2 x i8>)
define i8 @fshl_no_shift(i8 %x, i8 %y) {
; CHECK-LABEL: @fshl_no_shift(
; CHECK-NEXT: [[Z:%.*]] = call i8 @llvm.fshl.i8(i8 [[X:%.*]], i8 [[Y:%.*]], i8 0)
; CHECK-NEXT: ret i8 [[Z]]
;
%z = call i8 @llvm.fshl.i8(i8 %x, i8 %y, i8 0)
ret i8 %z
}
define i9 @fshr_no_shift(i9 %x, i9 %y) {
; CHECK-LABEL: @fshr_no_shift(
; CHECK-NEXT: [[Z:%.*]] = call i9 @llvm.fshr.i9(i9 [[X:%.*]], i9 [[Y:%.*]], i9 0)
; CHECK-NEXT: ret i9 [[Z]]
;
%z = call i9 @llvm.fshr.i9(i9 %x, i9 %y, i9 0)
ret i9 %z
}
define i8 @fshl_no_shift_modulo_bitwidth(i8 %x, i8 %y) {
; CHECK-LABEL: @fshl_no_shift_modulo_bitwidth(
; CHECK-NEXT: [[Z:%.*]] = call i8 @llvm.fshl.i8(i8 [[X:%.*]], i8 [[Y:%.*]], i8 40)
; CHECK-NEXT: ret i8 [[Z]]
;
%z = call i8 @llvm.fshl.i8(i8 %x, i8 %y, i8 40)
ret i8 %z
}
define i9 @fshr_no_shift_modulo_bitwidth(i9 %x, i9 %y) {
; CHECK-LABEL: @fshr_no_shift_modulo_bitwidth(
; CHECK-NEXT: [[Z:%.*]] = call i9 @llvm.fshr.i9(i9 [[X:%.*]], i9 [[Y:%.*]], i9 189)
; CHECK-NEXT: ret i9 [[Z]]
;
%z = call i9 @llvm.fshr.i9(i9 %x, i9 %y, i9 189)
ret i9 %z
}
define <2 x i7> @fshl_no_shift_modulo_bitwidth_splat(<2 x i7> %x, <2 x i7> %y) {
; CHECK-LABEL: @fshl_no_shift_modulo_bitwidth_splat(
; CHECK-NEXT: [[Z:%.*]] = call <2 x i7> @llvm.fshl.v2i7(<2 x i7> [[X:%.*]], <2 x i7> [[Y:%.*]], <2 x i7> <i7 21, i7 21>)
; CHECK-NEXT: ret <2 x i7> [[Z]]
;
%z = call <2 x i7> @llvm.fshl.v2i7(<2 x i7> %x, <2 x i7> %y, <2 x i7> <i7 21, i7 21>)
ret <2 x i7> %z
}
define <2 x i8> @fshr_no_shift_modulo_bitwidth_splat(<2 x i8> %x, <2 x i8> %y) {
; CHECK-LABEL: @fshr_no_shift_modulo_bitwidth_splat(
; CHECK-NEXT: [[Z:%.*]] = call <2 x i8> @llvm.fshr.v2i8(<2 x i8> [[X:%.*]], <2 x i8> [[Y:%.*]], <2 x i8> <i8 72, i8 72>)
; CHECK-NEXT: ret <2 x i8> [[Z]]
;
%z = call <2 x i8> @llvm.fshr.v2i8(<2 x i8> %x, <2 x i8> %y, <2 x i8> <i8 72, i8 72>)
ret <2 x i8> %z
}