RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 19:23:23 +01:00
Code Issues Projects Releases Wiki Activity

ARM: permit full range of valid ADR immediates.

Browse Source 
This fixes an issue where trying to assemlbe valid ADR instructions would cause
LLVM to hit a failed assertion.

Patch by Keith Walker.

llvm-svn: 176189
This commit is contained in:
Tim Northover 2013-02-27 16:43:09 +00:00
parent 33d5dd0b08
commit 281992500a
2 changed files with 19 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
View File

@ -655,15 +655,28 @@ getAdrLabelOpValue(const MCInst &MI, unsigned OpIdx,
int32_t offset = MO.getImm();
uint32_t Val = 0x2000;
int SoImmVal;
if (offset == INT32_MIN) {
Val = 0x1000;
offset = 0;
SoImmVal = 0;
} else if (offset < 0) {
Val = 0x1000;
offset *= -1;
SoImmVal = ARM_AM::getSOImmVal(offset);
if(SoImmVal == -1) {
Val = 0x2000;
offset *= -1;
SoImmVal = ARM_AM::getSOImmVal(offset);
}
} else {
SoImmVal = ARM_AM::getSOImmVal(offset);
if(SoImmVal == -1) {
Val = 0x1000;
offset *= -1;
SoImmVal = ARM_AM::getSOImmVal(offset);
}
}
int SoImmVal = ARM_AM::getSOImmVal(offset);
assert(SoImmVal != -1 && "Not a valid so_imm value!");
Val |= SoImmVal;

4
test/MC/ARM/basic-arm-instructions.s
View File

@ -143,11 +143,15 @@ Lforward:
adr r1, #-0x0
adr r1, #-0x12000000
adr r1, #-0x80000001
adr r1, #0x12000000
adr r1, #0x80000001
@ CHECK: adr r1, #-0 @ encoding: [0x00,0x10,0x4f,0xe2]
@ CHECK: adr r1, #-301989888 @ encoding: [0x12,0x14,0x4f,0xe2]
@ CHECK: adr r1, #2147483647 @ encoding: [0x06,0x11,0x4f,0xe2]
@ CHECK: adr r1, #301989888 @ encoding: [0x12,0x14,0x8f,0xe2]
@ CHECK: adr r1, #-2147483647 @ encoding: [0x06,0x11,0x8f,0xe2]
@------------------------------------------------------------------------------