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Add target a target hook to get the register number used by the compact unwind
encoding for the registers it knows about. Return -1 if it can't handle that register. llvm-svn: 134202
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@ -106,6 +106,10 @@ public:
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int getSEHRegNum(unsigned RegNum) const {
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return TRI->getSEHRegNum(RegNum);
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}
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int getCompactUnwindRegNum(unsigned RegNum) const {
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return TRI->getCompactUnwindRegNum(RegNum);
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}
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};
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}
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@ -720,6 +720,12 @@ public:
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virtual int getSEHRegNum(unsigned i) const {
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return i;
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}
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/// getCompactUnwindRegNum - This function maps the register to the number for
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/// compact unwind encoding. Return -1 if the register isn't valid.
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virtual int getCompactUnwindRegNum(unsigned) const {
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return -1;
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}
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};
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@ -105,6 +105,21 @@ int X86RegisterInfo::getLLVMRegNum(unsigned DwarfRegNo, bool isEH) const {
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return X86GenRegisterInfo::getLLVMRegNumFull(DwarfRegNo, Flavour);
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}
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/// getCompactUnwindRegNum - This function maps the register to the number for
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/// compact unwind encoding. Return -1 if the register isn't valid.
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int X86RegisterInfo::getCompactUnwindRegNum(unsigned RegNum) const {
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switch (RegNum) {
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case X86::EBX: case X86::RBX: return 1;
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case X86::ECX: case X86::RCX: return 2;
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case X86::EDX: case X86::RDX: return 3;
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case X86::EDI: case X86::RDI: return 4;
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case X86::ESI: case X86::RSI: return 5;
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case X86::EBP: case X86::RBP: return 6;
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}
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return -1;
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}
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int
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X86RegisterInfo::getSEHRegNum(unsigned i) const {
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int reg = getX86RegNum(i);
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@ -81,6 +81,10 @@ public:
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// FIXME: This should be tablegen'd like getDwarfRegNum is
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int getSEHRegNum(unsigned i) const;
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/// getCompactUnwindRegNum - This function maps the register to the number for
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/// compact unwind encoding. Return -1 if the register isn't valid.
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int getCompactUnwindRegNum(unsigned RegNum) const;
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/// Code Generation virtual methods...
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///
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