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[AArch64] Statepoint support for AArch64.
Differential Revision: https://reviews.llvm.org/D66012 Patch By: loicottet (with major rebase by me)
This commit is contained in:
Philip Reames
parent
36d8b73158
commit
291e6fa894
@ -95,6 +95,8 @@ public:
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const MachineInstr &MI);
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void LowerPATCHPOINT(MCStreamer &OutStreamer, StackMaps &SM,
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const MachineInstr &MI);
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void LowerSTATEPOINT(MCStreamer &OutStreamer, StackMaps &SM,
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const MachineInstr &MI);
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void LowerPATCHABLE_FUNCTION_ENTER(const MachineInstr &MI);
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void LowerPATCHABLE_FUNCTION_EXIT(const MachineInstr &MI);
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@ -944,6 +946,47 @@ void AArch64AsmPrinter::LowerPATCHPOINT(MCStreamer &OutStreamer, StackMaps &SM,
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EmitToStreamer(OutStreamer, MCInstBuilder(AArch64::HINT).addImm(0));
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}
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void AArch64AsmPrinter::LowerSTATEPOINT(MCStreamer &OutStreamer, StackMaps &SM,
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const MachineInstr &MI) {
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StatepointOpers SOpers(&MI);
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if (unsigned PatchBytes = SOpers.getNumPatchBytes()) {
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assert(PatchBytes % 4 == 0 && "Invalid number of NOP bytes requested!");
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for (unsigned i = 0; i < PatchBytes; i += 4)
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EmitToStreamer(OutStreamer, MCInstBuilder(AArch64::HINT).addImm(0));
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} else {
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// Lower call target and choose correct opcode
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const MachineOperand &CallTarget = SOpers.getCallTarget();
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MCOperand CallTargetMCOp;
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unsigned CallOpcode;
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switch (CallTarget.getType()) {
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case MachineOperand::MO_GlobalAddress:
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case MachineOperand::MO_ExternalSymbol:
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MCInstLowering.lowerOperand(CallTarget, CallTargetMCOp);
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CallOpcode = AArch64::BL;
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break;
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case MachineOperand::MO_Immediate:
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CallTargetMCOp = MCOperand::createImm(CallTarget.getImm());
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CallOpcode = AArch64::BL;
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break;
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case MachineOperand::MO_Register:
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CallTargetMCOp = MCOperand::createReg(CallTarget.getReg());
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CallOpcode = AArch64::BLR;
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break;
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default:
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llvm_unreachable("Unsupported operand type in statepoint call target");
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break;
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}
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EmitToStreamer(OutStreamer,
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MCInstBuilder(CallOpcode).addOperand(CallTargetMCOp));
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}
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auto &Ctx = OutStreamer.getContext();
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MCSymbol *MILabel = Ctx.createTempSymbol();
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OutStreamer.emitLabel(MILabel);
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SM.recordStatepoint(*MILabel, MI);
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}
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void AArch64AsmPrinter::EmitFMov0(const MachineInstr &MI) {
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Register DestReg = MI.getOperand(0).getReg();
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if (STI->hasZeroCycleZeroingFP() && !STI->hasZeroCycleZeroingFPWorkaround()) {
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@ -1225,6 +1268,9 @@ void AArch64AsmPrinter::emitInstruction(const MachineInstr *MI) {
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case TargetOpcode::PATCHPOINT:
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return LowerPATCHPOINT(*OutStreamer, SM, *MI);
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case TargetOpcode::STATEPOINT:
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return LowerSTATEPOINT(*OutStreamer, SM, *MI);
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case TargetOpcode::PATCHABLE_FUNCTION_ENTER:
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LowerPATCHABLE_FUNCTION_ENTER(*MI);
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return;
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@ -1804,6 +1804,7 @@ MachineBasicBlock *AArch64TargetLowering::EmitInstrWithCustomInserter(
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case TargetOpcode::STACKMAP:
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case TargetOpcode::PATCHPOINT:
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case TargetOpcode::STATEPOINT:
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return emitPatchPoint(MI, BB);
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case AArch64::CATCHRET:
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@ -107,6 +107,13 @@ unsigned AArch64InstrInfo::getInstSizeInBytes(const MachineInstr &MI) const {
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NumBytes = PatchPointOpers(&MI).getNumPatchBytes();
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assert(NumBytes % 4 == 0 && "Invalid number of NOP bytes requested!");
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break;
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case TargetOpcode::STATEPOINT:
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NumBytes = StatepointOpers(&MI).getNumPatchBytes();
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assert(NumBytes % 4 == 0 && "Invalid number of NOP bytes requested!");
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// No patch bytes means a normal call inst is emitted
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if (NumBytes == 0)
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NumBytes = 4;
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break;
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case AArch64::TLSDESC_CALLSEQ:
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// This gets lowered to an instruction sequence which takes 16 bytes
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NumBytes = 16;
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@ -611,9 +611,10 @@ void AArch64RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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MI.getOperand(FIOperandNum).getTargetFlags() & AArch64II::MO_TAGGED;
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Register FrameReg;
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// Special handling of dbg_value, stackmap and patchpoint instructions.
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// Special handling of dbg_value, stackmap patchpoint statepoint instructions.
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if (MI.isDebugValue() || MI.getOpcode() == TargetOpcode::STACKMAP ||
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MI.getOpcode() == TargetOpcode::PATCHPOINT) {
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MI.getOpcode() == TargetOpcode::PATCHPOINT ||
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MI.getOpcode() == TargetOpcode::STATEPOINT) {
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StackOffset Offset =
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TFI->resolveFrameIndexReference(MF, FrameIndex, FrameReg,
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/*PreferFP=*/true,
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@ -192,6 +192,10 @@ int AArch64TTIImpl::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
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if ((Idx < 4) || (Imm.getBitWidth() <= 64 && isInt<64>(Imm.getSExtValue())))
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return TTI::TCC_Free;
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break;
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case Intrinsic::experimental_gc_statepoint:
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if ((Idx < 5) || (Imm.getBitWidth() <= 64 && isInt<64>(Imm.getSExtValue())))
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return TTI::TCC_Free;
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break;
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}
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return AArch64TTIImpl::getIntImmCost(Imm, Ty, CostKind);
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}
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218
test/CodeGen/AArch64/statepoint-call-lowering.ll
Normal file
218
test/CodeGen/AArch64/statepoint-call-lowering.ll
Normal file
@ -0,0 +1,218 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs < %s | FileCheck %s
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; A collection of basic functionality tests for statepoint lowering - most
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; interesting cornercases are exercised through the x86 tests.
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target datalayout = "e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "aarch64-unknown-linux-gnu"
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%struct = type { i64, i64 }
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declare zeroext i1 @return_i1()
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declare zeroext i32 @return_i32()
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declare i32* @return_i32ptr()
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declare float @return_float()
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declare %struct @return_struct()
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declare void @varargf(i32, ...)
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define i1 @test_i1_return() gc "statepoint-example" {
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; CHECK-LABEL: test_i1_return:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: bl return_i1
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; CHECK-NEXT: .Ltmp2:
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; CHECK-NEXT: and w0, w0, #0x1
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; CHECK-NEXT: ret
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; This is just checking that a i1 gets lowered normally when there's no extra
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; state arguments to the statepoint
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entry:
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%safepoint_token = tail call token (i64, i32, i1 ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_i1f(i64 0, i32 0, i1 ()* @return_i1, i32 0, i32 0, i32 0, i32 0)
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%call1 = call zeroext i1 @llvm.experimental.gc.result.i1(token %safepoint_token)
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ret i1 %call1
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}
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define i32 @test_i32_return() gc "statepoint-example" {
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; CHECK-LABEL: test_i32_return:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: bl return_i32
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; CHECK-NEXT: .Ltmp3:
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; CHECK-NEXT: ret
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entry:
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%safepoint_token = tail call token (i64, i32, i32 ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_i32f(i64 0, i32 0, i32 ()* @return_i32, i32 0, i32 0, i32 0, i32 0)
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%call1 = call zeroext i32 @llvm.experimental.gc.result.i32(token %safepoint_token)
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ret i32 %call1
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}
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define i32* @test_i32ptr_return() gc "statepoint-example" {
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; CHECK-LABEL: test_i32ptr_return:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: bl return_i32ptr
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; CHECK-NEXT: .Ltmp4:
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; CHECK-NEXT: ret
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entry:
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%safepoint_token = tail call token (i64, i32, i32* ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_p0i32f(i64 0, i32 0, i32* ()* @return_i32ptr, i32 0, i32 0, i32 0, i32 0)
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%call1 = call i32* @llvm.experimental.gc.result.p0i32(token %safepoint_token)
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ret i32* %call1
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}
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define float @test_float_return() gc "statepoint-example" {
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; CHECK-LABEL: test_float_return:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: bl return_float
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; CHECK-NEXT: .Ltmp5:
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; CHECK-NEXT: ret
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entry:
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%safepoint_token = tail call token (i64, i32, float ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_f32f(i64 0, i32 0, float ()* @return_float, i32 0, i32 0, i32 0, i32 0)
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%call1 = call float @llvm.experimental.gc.result.f32(token %safepoint_token)
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ret float %call1
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}
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define %struct @test_struct_return() gc "statepoint-example" {
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; CHECK-LABEL: test_struct_return:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: bl return_struct
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; CHECK-NEXT: .Ltmp6:
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; CHECK-NEXT: ret
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entry:
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%safepoint_token = tail call token (i64, i32, %struct ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_structf(i64 0, i32 0, %struct ()* @return_struct, i32 0, i32 0, i32 0, i32 0)
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%call1 = call %struct @llvm.experimental.gc.result.struct(token %safepoint_token)
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ret %struct %call1
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}
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define i1 @test_relocate(i32 addrspace(1)* %a) gc "statepoint-example" {
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; CHECK-LABEL: test_relocate:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: sub sp, sp, #16 // =16
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: str x0, [sp, #8]
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; CHECK-NEXT: bl return_i1
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; CHECK-NEXT: .Ltmp7:
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; CHECK-NEXT: and w0, w0, #0x1
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; CHECK-NEXT: add sp, sp, #16 // =16
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; CHECK-NEXT: ret
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; Check that an ununsed relocate has no code-generation impact
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entry:
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%safepoint_token = tail call token (i64, i32, i1 ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_i1f(i64 0, i32 0, i1 ()* @return_i1, i32 0, i32 0, i32 0, i32 0) ["gc-live" (i32 addrspace(1)* %a)]
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%call1 = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token %safepoint_token, i32 0, i32 0)
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%call2 = call zeroext i1 @llvm.experimental.gc.result.i1(token %safepoint_token)
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ret i1 %call2
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}
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define void @test_void_vararg() gc "statepoint-example" {
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; CHECK-LABEL: test_void_vararg:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov w0, #42
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; CHECK-NEXT: mov w1, #43
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; CHECK-NEXT: bl varargf
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; CHECK-NEXT: .Ltmp8:
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; CHECK-NEXT: ret
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; Check a statepoint wrapping a *void* returning vararg function works
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entry:
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%safepoint_token = tail call token (i64, i32, void (i32, ...)*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidi32varargf(i64 0, i32 0, void (i32, ...)* @varargf, i32 2, i32 0, i32 42, i32 43, i32 0, i32 0)
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;; if we try to use the result from a statepoint wrapping a
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;; non-void-returning varargf, we will experience a crash.
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ret void
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}
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define i1 @test_i1_return_patchable() gc "statepoint-example" {
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; CHECK-LABEL: test_i1_return_patchable:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: nop
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; CHECK-NEXT: .Ltmp9:
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; CHECK-NEXT: and w0, w0, #0x1
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; CHECK-NEXT: ret
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; A patchable variant of test_i1_return
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entry:
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%safepoint_token = tail call token (i64, i32, i1 ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_i1f(i64 0, i32 4, i1 ()*null, i32 0, i32 0, i32 0, i32 0)
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%call1 = call zeroext i1 @llvm.experimental.gc.result.i1(token %safepoint_token)
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ret i1 %call1
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}
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declare void @consume(i32 addrspace(1)* %obj)
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define i1 @test_cross_bb(i32 addrspace(1)* %a, i1 %external_cond) gc "statepoint-example" {
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; CHECK-LABEL: test_cross_bb:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
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; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: .cfi_offset w19, -8
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; CHECK-NEXT: .cfi_offset w20, -16
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; CHECK-NEXT: .cfi_offset w30, -32
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; CHECK-NEXT: mov w20, w1
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; CHECK-NEXT: str x0, [sp, #8]
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; CHECK-NEXT: bl return_i1
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; CHECK-NEXT: .Ltmp10:
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; CHECK-NEXT: tbz w20, #0, .LBB8_2
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; CHECK-NEXT: // %bb.1: // %left
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; CHECK-NEXT: mov w19, w0
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; CHECK-NEXT: ldr x0, [sp, #8]
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; CHECK-NEXT: bl consume
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; CHECK-NEXT: and w0, w19, #0x1
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; CHECK-NEXT: b .LBB8_3
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; CHECK-NEXT: .LBB8_2: // %right
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; CHECK-NEXT: mov w0, #1
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; CHECK-NEXT: .LBB8_3: // %right
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; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
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; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
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; CHECK-NEXT: ret
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entry:
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%safepoint_token = tail call token (i64, i32, i1 ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_i1f(i64 0, i32 0, i1 ()* @return_i1, i32 0, i32 0, i32 0, i32 0) ["gc-live" (i32 addrspace(1)* %a)]
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br i1 %external_cond, label %left, label %right
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left:
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%call1 = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token %safepoint_token, i32 0, i32 0)
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%call2 = call zeroext i1 @llvm.experimental.gc.result.i1(token %safepoint_token)
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call void @consume(i32 addrspace(1)* %call1)
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ret i1 %call2
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right:
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ret i1 true
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}
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%struct2 = type { i64, i64, i64 }
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declare void @consume_attributes(i32, i8* nest, i32, %struct2* byval)
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define void @test_attributes(%struct2* byval %s) gc "statepoint-example" {
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; CHECK-LABEL: test_attributes:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: sub sp, sp, #32 // =32
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: ldr x8, [sp, #48]
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; CHECK-NEXT: ldr q0, [sp, #32]
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; CHECK-NEXT: mov w0, #42
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; CHECK-NEXT: mov w1, #17
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; CHECK-NEXT: mov x18, xzr
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; CHECK-NEXT: str x8, [sp, #16]
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; CHECK-NEXT: str q0, [sp]
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; CHECK-NEXT: bl consume_attributes
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; CHECK-NEXT: .Ltmp11:
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; CHECK-NEXT: add sp, sp, #32 // =32
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; CHECK-NEXT: ret
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entry:
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; Check that arguments with attributes are lowered correctly.
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; We call a function that has a nest argument and a byval argument.
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%statepoint_token = call token (i64, i32, void (i32, i8*, i32, %struct2*)*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidi32p0i8i32p0s_struct2sf(i64 0, i32 0, void (i32, i8*, i32, %struct2*)* @consume_attributes, i32 4, i32 0, i32 42, i8* nest null, i32 17, %struct2* byval %s, i32 0, i32 0)
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ret void
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}
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declare token @llvm.experimental.gc.statepoint.p0f_i1f(i64, i32, i1 ()*, i32, i32, ...)
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declare i1 @llvm.experimental.gc.result.i1(token)
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declare token @llvm.experimental.gc.statepoint.p0f_i32f(i64, i32, i32 ()*, i32, i32, ...)
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declare i32 @llvm.experimental.gc.result.i32(token)
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declare token @llvm.experimental.gc.statepoint.p0f_p0i32f(i64, i32, i32* ()*, i32, i32, ...)
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declare i32* @llvm.experimental.gc.result.p0i32(token)
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declare token @llvm.experimental.gc.statepoint.p0f_f32f(i64, i32, float ()*, i32, i32, ...)
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declare float @llvm.experimental.gc.result.f32(token)
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declare token @llvm.experimental.gc.statepoint.p0f_structf(i64, i32, %struct ()*, i32, i32, ...)
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declare %struct @llvm.experimental.gc.result.struct(token)
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declare token @llvm.experimental.gc.statepoint.p0f_isVoidi32varargf(i64, i32, void (i32, ...)*, i32, i32, ...)
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declare token @llvm.experimental.gc.statepoint.p0f_isVoidi32p0i8i32p0s_struct2sf(i64, i32, void (i32, i8*, i32, %struct2*)*, i32, i32, ...)
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declare i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token, i32, i32)
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