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[SLP] add tests for 2-wide reductions; NFC
This commit is contained in:
Sanjay Patel
parent
2d616bdac4
commit
292dd62299
@ -7,7 +7,8 @@ target triple = "i386-apple-macosx10.8.0"
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define double @foo(double* nocapture %D) {
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; CHECK-LABEL: @foo(
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; CHECK-NEXT: br label [[TMP1:%.*]]
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; CHECK: [[I_02:%.*]] = phi i32 [ 0, [[TMP0:%.*]] ], [ [[TMP12:%.*]], [[TMP1]] ]
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; CHECK: 1:
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; CHECK-NEXT: [[I_02:%.*]] = phi i32 [ 0, [[TMP0:%.*]] ], [ [[TMP12:%.*]], [[TMP1]] ]
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; CHECK-NEXT: [[SUM_01:%.*]] = phi double [ 0.000000e+00, [[TMP0]] ], [ [[TMP11:%.*]], [[TMP1]] ]
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; CHECK-NEXT: [[TMP2:%.*]] = shl nsw i32 [[I_02]], 1
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; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds double, double* [[D:%.*]], i32 [[TMP2]]
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@ -22,7 +23,8 @@ define double @foo(double* nocapture %D) {
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; CHECK-NEXT: [[TMP12]] = add nsw i32 [[I_02]], 1
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[TMP12]], 100
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[TMP13:%.*]], label [[TMP1]]
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; CHECK: ret double [[TMP11]]
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; CHECK: 13:
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; CHECK-NEXT: ret double [[TMP11]]
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;
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br label %1
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@ -49,3 +51,114 @@ define double @foo(double* nocapture %D) {
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ret double %9
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}
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define i1 @two_wide_fcmp_reduction(<2 x double> %a0) {
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; CHECK-LABEL: @two_wide_fcmp_reduction(
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; CHECK-NEXT: [[A:%.*]] = fcmp ogt <2 x double> [[A0:%.*]], <double 1.000000e+00, double 1.000000e+00>
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; CHECK-NEXT: [[B:%.*]] = extractelement <2 x i1> [[A]], i32 0
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; CHECK-NEXT: [[C:%.*]] = extractelement <2 x i1> [[A]], i32 1
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; CHECK-NEXT: [[D:%.*]] = and i1 [[B]], [[C]]
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; CHECK-NEXT: ret i1 [[D]]
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;
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%a = fcmp ogt <2 x double> %a0, <double 1.0, double 1.0>
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%b = extractelement <2 x i1> %a, i32 0
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%c = extractelement <2 x i1> %a, i32 1
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%d = and i1 %b, %c
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ret i1 %d
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}
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define double @fadd_reduction(<2 x double> %a0) {
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; CHECK-LABEL: @fadd_reduction(
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; CHECK-NEXT: [[A:%.*]] = fadd fast <2 x double> [[A0:%.*]], <double 1.000000e+00, double 1.000000e+00>
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; CHECK-NEXT: [[B:%.*]] = extractelement <2 x double> [[A]], i32 0
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; CHECK-NEXT: [[C:%.*]] = extractelement <2 x double> [[A]], i32 1
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; CHECK-NEXT: [[D:%.*]] = fadd fast double [[B]], [[C]]
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; CHECK-NEXT: ret double [[D]]
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;
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%a = fadd fast <2 x double> %a0, <double 1.000000e+00, double 1.000000e+00>
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%b = extractelement <2 x double> %a, i32 0
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%c = extractelement <2 x double> %a, i32 1
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%d = fadd fast double %b, %c
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ret double %d
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}
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; PR43745 https://bugs.llvm.org/show_bug.cgi?id=43745
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define i1 @fcmp_lt_gt(double %a, double %b, double %c) {
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; CHECK-LABEL: @fcmp_lt_gt(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[FNEG:%.*]] = fneg double [[B:%.*]]
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; CHECK-NEXT: [[MUL:%.*]] = fmul double [[A:%.*]], 2.000000e+00
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; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> undef, double [[FNEG]], i32 0
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; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> [[TMP0]], double [[C:%.*]], i32 1
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; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> undef, double [[C]], i32 0
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; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x double> [[TMP2]], double [[B]], i32 1
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; CHECK-NEXT: [[TMP4:%.*]] = fsub <2 x double> [[TMP1]], [[TMP3]]
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; CHECK-NEXT: [[TMP5:%.*]] = insertelement <2 x double> undef, double [[MUL]], i32 0
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; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x double> [[TMP5]], double [[MUL]], i32 1
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; CHECK-NEXT: [[TMP7:%.*]] = fdiv <2 x double> [[TMP4]], [[TMP6]]
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; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x double> [[TMP7]], i32 1
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; CHECK-NEXT: [[CMP:%.*]] = fcmp olt double [[TMP8]], 0x3EB0C6F7A0B5ED8D
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; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x double> [[TMP7]], i32 0
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; CHECK-NEXT: [[CMP4:%.*]] = fcmp olt double [[TMP9]], 0x3EB0C6F7A0B5ED8D
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; CHECK-NEXT: [[OR_COND:%.*]] = and i1 [[CMP]], [[CMP4]]
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; CHECK-NEXT: br i1 [[OR_COND]], label [[CLEANUP:%.*]], label [[LOR_LHS_FALSE:%.*]]
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; CHECK: lor.lhs.false:
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; CHECK-NEXT: [[TMP10:%.*]] = fcmp ule <2 x double> [[TMP7]], <double 1.000000e+00, double 1.000000e+00>
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; CHECK-NEXT: [[TMP11:%.*]] = extractelement <2 x i1> [[TMP10]], i32 0
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; CHECK-NEXT: [[TMP12:%.*]] = extractelement <2 x i1> [[TMP10]], i32 1
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; CHECK-NEXT: [[NOT_OR_COND9:%.*]] = or i1 [[TMP11]], [[TMP12]]
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; CHECK-NEXT: ret i1 [[NOT_OR_COND9]]
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; CHECK: cleanup:
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; CHECK-NEXT: ret i1 false
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;
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entry:
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%fneg = fneg double %b
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%add = fsub double %c, %b
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%mul = fmul double %a, 2.000000e+00
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%div = fdiv double %add, %mul
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%sub = fsub double %fneg, %c
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%div3 = fdiv double %sub, %mul
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%cmp = fcmp olt double %div, 0x3EB0C6F7A0B5ED8D
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%cmp4 = fcmp olt double %div3, 0x3EB0C6F7A0B5ED8D
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%or.cond = and i1 %cmp, %cmp4
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br i1 %or.cond, label %cleanup, label %lor.lhs.false
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lor.lhs.false:
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%cmp5 = fcmp ule double %div, 1.000000e+00
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%cmp7 = fcmp ule double %div3, 1.000000e+00
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%not.or.cond9 = or i1 %cmp7, %cmp5
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ret i1 %not.or.cond9
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cleanup:
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ret i1 false
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}
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define i1 @fcmp_lt(double %a, double %b, double %c) {
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; CHECK-LABEL: @fcmp_lt(
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; CHECK-NEXT: [[FNEG:%.*]] = fneg double [[B:%.*]]
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; CHECK-NEXT: [[MUL:%.*]] = fmul double [[A:%.*]], 2.000000e+00
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; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> undef, double [[FNEG]], i32 0
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; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> [[TMP1]], double [[C:%.*]], i32 1
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; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x double> undef, double [[C]], i32 0
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; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x double> [[TMP3]], double [[B]], i32 1
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; CHECK-NEXT: [[TMP5:%.*]] = fsub <2 x double> [[TMP2]], [[TMP4]]
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; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x double> undef, double [[MUL]], i32 0
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; CHECK-NEXT: [[TMP7:%.*]] = insertelement <2 x double> [[TMP6]], double [[MUL]], i32 1
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; CHECK-NEXT: [[TMP8:%.*]] = fdiv <2 x double> [[TMP5]], [[TMP7]]
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; CHECK-NEXT: [[TMP9:%.*]] = fcmp uge <2 x double> [[TMP8]], <double 0x3EB0C6F7A0B5ED8D, double 0x3EB0C6F7A0B5ED8D>
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; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP9]], i32 0
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; CHECK-NEXT: [[TMP11:%.*]] = extractelement <2 x i1> [[TMP9]], i32 1
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; CHECK-NEXT: [[NOT_OR_COND:%.*]] = or i1 [[TMP10]], [[TMP11]]
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; CHECK-NEXT: ret i1 [[NOT_OR_COND]]
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;
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%fneg = fneg double %b
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%add = fsub double %c, %b
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%mul = fmul double %a, 2.000000e+00
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%div = fdiv double %add, %mul
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%sub = fsub double %fneg, %c
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%div3 = fdiv double %sub, %mul
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%cmp = fcmp uge double %div, 0x3EB0C6F7A0B5ED8D
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%cmp4 = fcmp uge double %div3, 0x3EB0C6F7A0B5ED8D
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%not.or.cond = or i1 %cmp4, %cmp
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ret i1 %not.or.cond
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}
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