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Forgot the added files for plugable machine passes.
llvm-svn: 29436
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46
include/llvm/CodeGen/LinkAllCodegenComponents.h
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46
include/llvm/CodeGen/LinkAllCodegenComponents.h
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//===- llvm/Codegen/LinkAllCodegenComponents.h ------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by James M. Laskey and is distributed under the
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// University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This header file pulls in all codegen related passes for tools like lli and
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// llc that need this functionality.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_LINKALLCODEGENCOMPONENTS_H
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#define LLVM_CODEGEN_LINKALLCODEGENCOMPONENTS_H
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/ScheduleDAG.h"
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namespace {
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struct ForceCodegenLinking {
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ForceCodegenLinking() {
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// We must reference the passes in such a way that compilers will not
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// delete it all as dead code, even with whole program optimization,
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// yet is effectively a NO-OP. As the compiler isn't smart enough
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// to know that getenv() never returns -1, this will do the job.
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if (std::getenv("bar") != (char*) -1)
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return;
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(void) llvm::createSimpleRegisterAllocator();
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(void) llvm::createLocalRegisterAllocator();
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(void) llvm::createLinearScanRegisterAllocator();
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(void) llvm::createBFS_DAGScheduler(NULL, NULL);
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(void) llvm::createSimpleDAGScheduler(NULL, NULL);
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(void) llvm::createNoItinsDAGScheduler(NULL, NULL);
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(void) llvm::createBURRListDAGScheduler(NULL, NULL);
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(void) llvm::createTDRRListDAGScheduler(NULL, NULL);
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(void) llvm::createTDListDAGScheduler(NULL, NULL);
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}
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} ForceCodegenLinking; // Force link by creating a global definition.
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}
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#endif
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312
include/llvm/CodeGen/MachinePassRegistry.h
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312
include/llvm/CodeGen/MachinePassRegistry.h
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//===-- llvm/CodeGen/MachinePassRegistry.h ----------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_MACHINEPASSREGISTRY_H
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#define LLVM_CODEGEN_MACHINEPASSREGISTRY_H
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/ScheduleDAG.h"
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#include "llvm/Support/CommandLine.h"
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#include <iostream>
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namespace llvm {
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//===----------------------------------------------------------------------===//
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///
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/// MachinePassRegistryListener - Listener to adds and removals of nodes in
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/// registration list.
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///
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//===----------------------------------------------------------------------===//
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class MachinePassRegistryListener {
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public:
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MachinePassRegistryListener() {}
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virtual ~MachinePassRegistryListener() {}
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virtual void NotifyAdd(const char *N, const char *D) = 0;
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virtual void NotifyRemove(const char *N, const char *D) = 0;
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};
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//===----------------------------------------------------------------------===//
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///
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/// MachinePassRegistryNode - Machine pass node stored in registration list.
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///
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//===----------------------------------------------------------------------===//
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template<typename FunctionPassCtor>
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class MachinePassRegistryNode {
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private:
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MachinePassRegistryNode<FunctionPassCtor> *Next;// Next function pass in list.
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const char *Name; // Name of function pass.
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const char *Description; // Description string.
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FunctionPassCtor Ctor; // Function pass creator.
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public:
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MachinePassRegistryNode(const char *N, const char *D, FunctionPassCtor C)
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: Next(NULL)
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, Name(N)
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, Description(D)
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, Ctor(C)
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{}
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// Accessors
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MachinePassRegistryNode<FunctionPassCtor> *getNext()
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const { return Next; }
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MachinePassRegistryNode<FunctionPassCtor> **getNextAddress()
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{ return &Next; }
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const char *getName() const { return Name; }
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const char *getDescription() const { return Description; }
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FunctionPassCtor getCtor() const { return Ctor; }
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void setNext(MachinePassRegistryNode<FunctionPassCtor> *N) { Next = N; }
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};
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//===----------------------------------------------------------------------===//
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///
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/// MachinePassRegistry - Track the registration of machine passes.
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///
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//===----------------------------------------------------------------------===//
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template<typename FunctionPassCtor>
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class MachinePassRegistry {
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private:
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MachinePassRegistryNode<FunctionPassCtor> *List;
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// List of registry nodes.
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FunctionPassCtor Cache; // Cached function pass creator.
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MachinePassRegistryListener* Listener;// Listener for list adds are removes.
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public:
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// NO CONSTRUCTOR - we don't want static constructor ordering to mess
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// with the registry.
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// Accessors.
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//
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MachinePassRegistryNode<FunctionPassCtor> *getList() { return List; }
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FunctionPassCtor getCache() { return Cache; }
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void setCache(FunctionPassCtor C) { Cache = C; }
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void setListener(MachinePassRegistryListener *L) { Listener = L; }
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/// Add - Adds a function pass to the registration list.
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///
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void Add(MachinePassRegistryNode<FunctionPassCtor> *Node) {
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Node->setNext(List);
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List = Node;
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if (Listener) Listener->NotifyAdd(Node->getName(), Node->getDescription());
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}
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/// Remove - Removes a function pass from the registration list.
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///
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void Remove(MachinePassRegistryNode<FunctionPassCtor> *Node) {
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for (MachinePassRegistryNode<FunctionPassCtor> **I = &List;
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*I; I = (*I)->getNextAddress()) {
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if (*I == Node) {
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#if 0 // FIXME: Command opt needs to call a termination routine.
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if (Listener) Listener->NotifyRemove(Node->getName(),
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Node->getDescription());
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#endif
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*I = (*I)->getNext();
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break;
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}
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}
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}
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/// FInd - Finds and returns a function pass in registration list, otherwise
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/// returns NULL.
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MachinePassRegistryNode<FunctionPassCtor> *Find(const char *Name) {
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for (MachinePassRegistryNode<FunctionPassCtor> *I = List;
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I; I = I->getNext()) {
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if (std::string(Name) == std::string(I->getName())) return I;
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}
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return NULL;
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}
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};
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//===----------------------------------------------------------------------===//
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///
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/// RegisterRegAlloc class - Track the registration of register allocators.
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///
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//===----------------------------------------------------------------------===//
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class RegisterRegAlloc : public MachinePassRegistryNode<FunctionPass *(*)()> {
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public:
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typedef FunctionPass *(*FunctionPassCtor)();
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static MachinePassRegistry<FunctionPassCtor> Registry;
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RegisterRegAlloc(const char *N, const char *D, FunctionPassCtor C)
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: MachinePassRegistryNode<FunctionPassCtor>(N, D, C)
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{ Registry.Add(this); }
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~RegisterRegAlloc() { Registry.Remove(this); }
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// Accessors.
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//
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RegisterRegAlloc *getNext() const {
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return (RegisterRegAlloc *)
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MachinePassRegistryNode<FunctionPassCtor>::getNext();
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}
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static RegisterRegAlloc *getList() {
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return (RegisterRegAlloc *)Registry.getList();
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}
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static FunctionPassCtor getCache() {
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return Registry.getCache();
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}
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static void setCache(FunctionPassCtor C) {
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Registry.setCache(C);
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}
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static void setListener(MachinePassRegistryListener *L) {
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Registry.setListener(L);
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}
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/// FirstCtor - Finds the first register allocator in registration
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/// list and returns its creator function, otherwise return NULL.
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static FunctionPassCtor FirstCtor() {
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MachinePassRegistryNode<FunctionPassCtor> *Node = Registry.getList();
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return Node ? Node->getCtor() : NULL;
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}
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/// FindCtor - Finds a register allocator in registration list and returns
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/// its creator function, otherwise return NULL.
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static FunctionPassCtor FindCtor(const char *N) {
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MachinePassRegistryNode<FunctionPassCtor> *Node = Registry.Find(N);
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return Node ? Node->getCtor() : NULL;
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}
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};
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//===----------------------------------------------------------------------===//
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///
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/// RegisterScheduler class - Track the registration of instruction schedulers.
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///
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//===----------------------------------------------------------------------===//
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class ScheduleDAG;
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class SelectionDAG;
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class MachineBasicBlock;
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class RegisterScheduler : public
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MachinePassRegistryNode<ScheduleDAG *(*)(SelectionDAG*, MachineBasicBlock*)> {
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public:
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typedef ScheduleDAG *(*FunctionPassCtor)(SelectionDAG*, MachineBasicBlock*);
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static MachinePassRegistry<FunctionPassCtor> Registry;
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RegisterScheduler(const char *N, const char *D, FunctionPassCtor C)
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: MachinePassRegistryNode<FunctionPassCtor>(N, D, C)
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{ Registry.Add(this); }
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~RegisterScheduler() { Registry.Remove(this); }
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// Accessors.
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//
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RegisterScheduler *getNext() const {
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return (RegisterScheduler *)
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MachinePassRegistryNode<FunctionPassCtor>::getNext();
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}
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static RegisterScheduler *getList() {
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return (RegisterScheduler *)Registry.getList();
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}
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static FunctionPassCtor getCache() {
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return Registry.getCache();
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}
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static void setCache(FunctionPassCtor C) {
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Registry.setCache(C);
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}
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static void setListener(MachinePassRegistryListener *L) {
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Registry.setListener(L);
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}
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/// FirstCtor - Finds the first instruction scheduler in registration
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/// list and returns its creator function, otherwise return NULL.
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static FunctionPassCtor FirstCtor() {
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MachinePassRegistryNode<FunctionPassCtor> *Node = Registry.getList();
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return Node ? Node->getCtor() : NULL;
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}
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/// FindCtor - Finds a instruction scheduler in registration list and returns
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/// its creator function, otherwise return NULL.
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static FunctionPassCtor FindCtor(const char *N) {
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MachinePassRegistryNode<FunctionPassCtor> *Node = Registry.Find(N);
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return Node ? Node->getCtor() : NULL;
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}
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};
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//===----------------------------------------------------------------------===//
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///
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/// RegisterPassParser class - Handle the addition of new machine passes.
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///
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//===----------------------------------------------------------------------===//
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template<class RegistryClass>
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class RegisterPassParser : public MachinePassRegistryListener,
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public cl::parser<const char *> {
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public:
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RegisterPassParser() {}
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void initialize(cl::Option &O) {
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cl::parser<const char *>::initialize(O);
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// Add existing passes to option.
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for (RegistryClass *Node = RegistryClass::getList();
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Node; Node = Node->getNext()) {
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addLiteralOption(Node->getName(), Node->getName(),
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Node->getDescription());
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}
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// Make sure we listen for list changes.
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RegistryClass::setListener(this);
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}
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// Implement the MachinePassRegistryListener callbacks.
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//
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virtual void NotifyAdd(const char *N, const char *D) {
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addLiteralOption(N, N, D);
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}
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virtual void NotifyRemove(const char *N, const char *D) {
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removeLiteralOption(N);
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}
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// ValLessThan - Provide a sorting comparator for Values elements...
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typedef std::pair<const char*, std::pair<const char*, const char*> > ValType;
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static bool ValLessThan(const ValType &VT1, const ValType &VT2) {
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return std::string(VT1.first) < std::string(VT2.first);
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}
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// printOptionInfo - Print out information about this option. Override the
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// default implementation to sort the table before we print...
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virtual void printOptionInfo(const cl::Option &O, unsigned GlobalWidth) const{
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RegisterPassParser *PNP = const_cast<RegisterPassParser*>(this);
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std::sort(PNP->Values.begin(), PNP->Values.end(), ValLessThan);
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cl::parser<const char *>::printOptionInfo(O, GlobalWidth);
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}
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};
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} // end namespace llvm
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#endif
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31
lib/CodeGen/MachinePassRegistry.cpp
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31
lib/CodeGen/MachinePassRegistry.cpp
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@ -0,0 +1,31 @@
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//===-- MachineInstr.cpp --------------------------------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by James M. Laskey and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/MachinePassRegistry.h"
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#include <iostream>
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using namespace llvm;
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//===---------------------------------------------------------------------===//
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///
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/// RegisterRegAlloc class - Track the registration of register allocators.
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///
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//===---------------------------------------------------------------------===//
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MachinePassRegistry<RegisterRegAlloc::FunctionPassCtor>
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RegisterRegAlloc::Registry;
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//===---------------------------------------------------------------------===//
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///
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/// RegisterScheduler class - Track the registration of instruction schedulers.
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///
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//===---------------------------------------------------------------------===//
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MachinePassRegistry<RegisterScheduler::FunctionPassCtor>
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RegisterScheduler::Registry;
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