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Really commit the test checking the argument lowering behaviour on x86-64 :).
llvm-svn: 50478
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test/CodeGen/X86/tailcallstack64.ll
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21
test/CodeGen/X86/tailcallstack64.ll
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; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 | grep TAILCALL
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; Check that lowered arguments on the stack do not overwrite each other.
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; Move param %in1 to temp register (%eax).
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; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 -x86-asm-syntax=att | grep {movl 40(%rsp), %eax}
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; Add %in1 %p1 to another temporary register (%r9d).
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; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 -x86-asm-syntax=att | grep {movl %edi, %r9d}
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; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 -x86-asm-syntax=att | grep {addl 32(%rsp), %r9d}
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; Move result of addition to stack.
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; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 -x86-asm-syntax=att | grep {movl %r9d, 40(%rsp)}
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; Move param %in2 to stack.
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; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 -x86-asm-syntax=att | grep {movl %eax, 32(%rsp)}
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declare fastcc i32 @tailcallee(i32 %p1, i32 %p2, i32 %p3, i32 %p4, i32 %p5, i32 %a, i32 %b)
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define fastcc i32 @tailcaller(i32 %p1, i32 %p2, i32 %p3, i32 %p4, i32 %p5, i32 %in1, i32 %in2) {
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entry:
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%tmp = add i32 %in1, %p1
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%retval = tail call fastcc i32 @tailcallee(i32 %p1, i32 %p2, i32 %p3, i32 %p4, i32 %p5, i32 %in2,i32 %tmp)
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ret i32 %retval
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}
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