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[mips] Rename [gs]etCanHaveModuleDir to more natural names
Summary: getCanHaveModuleDir() is renamed to isModuleDirectiveAllowed(), and setCanHaveModuleDir() is renamed to forbidModuleDirective() since it is only ever given a false argument. Reviewers: vmedic Reviewed By: vmedic Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D4885 llvm-svn: 215628
This commit is contained in:
Daniel Sanders
parent
b65d715ac5
commit
29c87ba390
@ -2318,9 +2318,10 @@ bool MipsAsmParser::ParseBracketSuffix(StringRef Name,
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bool MipsAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
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SMLoc NameLoc, OperandVector &Operands) {
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DEBUG(dbgs() << "ParseInstruction\n");
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// We have reached first instruction, module directive after
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// this is forbidden.
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getTargetStreamer().setCanHaveModuleDir(false);
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// We have reached first instruction, module directive are now forbidden.
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getTargetStreamer().forbidModuleDirective();
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// Check if we have valid mnemonic
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if (!mnemonicIsValid(Name, 0)) {
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Parser.eatToEndOfStatement();
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@ -2932,7 +2933,7 @@ bool MipsAsmParser::parseDirectiveModule() {
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MCAsmLexer &Lexer = getLexer();
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SMLoc L = Lexer.getLoc();
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if (!getTargetStreamer().getCanHaveModuleDir()) {
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if (!getTargetStreamer().isModuleDirectiveAllowed()) {
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// TODO : get a better message.
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reportParseError(".module directive must appear before any code");
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return false;
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@ -29,27 +29,21 @@
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using namespace llvm;
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MipsTargetStreamer::MipsTargetStreamer(MCStreamer &S)
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: MCTargetStreamer(S), canHaveModuleDirective(true) {
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: MCTargetStreamer(S), ModuleDirectiveAllowed(true) {
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GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
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}
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void MipsTargetStreamer::emitDirectiveSetMicroMips() {}
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void MipsTargetStreamer::emitDirectiveSetNoMicroMips() {}
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void MipsTargetStreamer::emitDirectiveSetMips16() {}
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void MipsTargetStreamer::emitDirectiveSetNoMips16() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetStreamer::emitDirectiveSetReorder() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetStreamer::emitDirectiveSetNoMips16() { forbidModuleDirective(); }
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void MipsTargetStreamer::emitDirectiveSetReorder() { forbidModuleDirective(); }
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void MipsTargetStreamer::emitDirectiveSetNoReorder() {}
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void MipsTargetStreamer::emitDirectiveSetMacro() { setCanHaveModuleDir(false); }
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void MipsTargetStreamer::emitDirectiveSetNoMacro() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetStreamer::emitDirectiveSetMsa() { setCanHaveModuleDir(false); }
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void MipsTargetStreamer::emitDirectiveSetNoMsa() { setCanHaveModuleDir(false); }
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void MipsTargetStreamer::emitDirectiveSetAt() { setCanHaveModuleDir(false); }
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void MipsTargetStreamer::emitDirectiveSetNoAt() { setCanHaveModuleDir(false); }
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void MipsTargetStreamer::emitDirectiveSetMacro() { forbidModuleDirective(); }
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void MipsTargetStreamer::emitDirectiveSetNoMacro() { forbidModuleDirective(); }
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void MipsTargetStreamer::emitDirectiveSetMsa() { forbidModuleDirective(); }
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void MipsTargetStreamer::emitDirectiveSetNoMsa() { forbidModuleDirective(); }
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void MipsTargetStreamer::emitDirectiveSetAt() { forbidModuleDirective(); }
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void MipsTargetStreamer::emitDirectiveSetNoAt() { forbidModuleDirective(); }
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void MipsTargetStreamer::emitDirectiveEnd(StringRef Name) {}
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void MipsTargetStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {}
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void MipsTargetStreamer::emitDirectiveAbiCalls() {}
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@ -62,30 +56,18 @@ void MipsTargetStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
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void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {}
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void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) {
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}
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void MipsTargetStreamer::emitDirectiveSetMips1() { setCanHaveModuleDir(false); }
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void MipsTargetStreamer::emitDirectiveSetMips2() { setCanHaveModuleDir(false); }
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void MipsTargetStreamer::emitDirectiveSetMips3() { setCanHaveModuleDir(false); }
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void MipsTargetStreamer::emitDirectiveSetMips4() { setCanHaveModuleDir(false); }
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void MipsTargetStreamer::emitDirectiveSetMips5() { setCanHaveModuleDir(false); }
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void MipsTargetStreamer::emitDirectiveSetMips32() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetStreamer::emitDirectiveSetMips32R2() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetStreamer::emitDirectiveSetMips32R6() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetStreamer::emitDirectiveSetMips64() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetStreamer::emitDirectiveSetMips64R2() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetStreamer::emitDirectiveSetMips64R6() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetStreamer::emitDirectiveSetDsp() { setCanHaveModuleDir(false); }
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void MipsTargetStreamer::emitDirectiveSetMips1() { forbidModuleDirective(); }
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void MipsTargetStreamer::emitDirectiveSetMips2() { forbidModuleDirective(); }
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void MipsTargetStreamer::emitDirectiveSetMips3() { forbidModuleDirective(); }
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void MipsTargetStreamer::emitDirectiveSetMips4() { forbidModuleDirective(); }
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void MipsTargetStreamer::emitDirectiveSetMips5() { forbidModuleDirective(); }
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void MipsTargetStreamer::emitDirectiveSetMips32() { forbidModuleDirective(); }
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void MipsTargetStreamer::emitDirectiveSetMips32R2() { forbidModuleDirective(); }
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void MipsTargetStreamer::emitDirectiveSetMips32R6() { forbidModuleDirective(); }
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void MipsTargetStreamer::emitDirectiveSetMips64() { forbidModuleDirective(); }
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void MipsTargetStreamer::emitDirectiveSetMips64R2() { forbidModuleDirective(); }
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void MipsTargetStreamer::emitDirectiveSetMips64R6() { forbidModuleDirective(); }
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void MipsTargetStreamer::emitDirectiveSetDsp() { forbidModuleDirective(); }
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void MipsTargetStreamer::emitDirectiveCpload(unsigned RegNo) {}
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void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
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const MCSymbol &Sym, bool IsReg) {
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@ -102,17 +84,17 @@ MipsTargetAsmStreamer::MipsTargetAsmStreamer(MCStreamer &S,
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void MipsTargetAsmStreamer::emitDirectiveSetMicroMips() {
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OS << "\t.set\tmicromips\n";
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setCanHaveModuleDir(false);
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forbidModuleDirective();
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}
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void MipsTargetAsmStreamer::emitDirectiveSetNoMicroMips() {
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OS << "\t.set\tnomicromips\n";
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setCanHaveModuleDir(false);
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forbidModuleDirective();
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips16() {
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OS << "\t.set\tmips16\n";
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setCanHaveModuleDir(false);
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forbidModuleDirective();
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}
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void MipsTargetAsmStreamer::emitDirectiveSetNoMips16() {
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@ -127,7 +109,7 @@ void MipsTargetAsmStreamer::emitDirectiveSetReorder() {
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void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() {
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OS << "\t.set\tnoreorder\n";
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setCanHaveModuleDir(false);
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forbidModuleDirective();
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMacro() {
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@ -275,7 +257,7 @@ void MipsTargetAsmStreamer::emitFMask(unsigned FPUBitmask,
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void MipsTargetAsmStreamer::emitDirectiveCpload(unsigned RegNo) {
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OS << "\t.cpload\t$"
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<< StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n";
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setCanHaveModuleDir(false);
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forbidModuleDirective();
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}
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void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo,
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@ -294,7 +276,7 @@ void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo,
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OS << ", ";
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OS << Sym.getName() << "\n";
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setCanHaveModuleDir(false);
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forbidModuleDirective();
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}
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void MipsTargetAsmStreamer::emitDirectiveModuleFP(
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@ -458,12 +440,12 @@ void MipsTargetELFStreamer::emitDirectiveSetMicroMips() {
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unsigned Flags = MCA.getELFHeaderEFlags();
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Flags |= ELF::EF_MIPS_MICROMIPS;
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MCA.setELFHeaderEFlags(Flags);
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setCanHaveModuleDir(false);
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forbidModuleDirective();
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}
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void MipsTargetELFStreamer::emitDirectiveSetNoMicroMips() {
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MicroMipsEnabled = false;
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setCanHaveModuleDir(false);
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forbidModuleDirective();
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}
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void MipsTargetELFStreamer::emitDirectiveSetMips16() {
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@ -471,7 +453,7 @@ void MipsTargetELFStreamer::emitDirectiveSetMips16() {
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unsigned Flags = MCA.getELFHeaderEFlags();
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Flags |= ELF::EF_MIPS_ARCH_ASE_M16;
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MCA.setELFHeaderEFlags(Flags);
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setCanHaveModuleDir(false);
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forbidModuleDirective();
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}
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void MipsTargetELFStreamer::emitDirectiveSetNoReorder() {
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@ -479,7 +461,7 @@ void MipsTargetELFStreamer::emitDirectiveSetNoReorder() {
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unsigned Flags = MCA.getELFHeaderEFlags();
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Flags |= ELF::EF_MIPS_NOREORDER;
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MCA.setELFHeaderEFlags(Flags);
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setCanHaveModuleDir(false);
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forbidModuleDirective();
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}
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void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) {
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@ -639,7 +621,7 @@ void MipsTargetELFStreamer::emitDirectiveCpload(unsigned RegNo) {
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TmpInst.addOperand(MCOperand::CreateReg(RegNo));
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getStreamer().EmitInstruction(TmpInst, STI);
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setCanHaveModuleDir(false);
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forbidModuleDirective();
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}
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void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo,
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@ -696,7 +678,7 @@ void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo,
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Inst.addOperand(MCOperand::CreateReg(RegNo));
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getStreamer().EmitInstruction(Inst, STI);
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setCanHaveModuleDir(false);
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forbidModuleDirective();
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}
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void MipsTargetELFStreamer::emitMipsAbiFlags() {
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@ -131,7 +131,7 @@ void MipsAsmPrinter::emitPseudoIndirectBranch(MCStreamer &OutStreamer,
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void MipsAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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MipsTargetStreamer &TS = getTargetStreamer();
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TS.setCanHaveModuleDir(false);
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TS.forbidModuleDirective();
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if (MI->isDebugValue()) {
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SmallString<128> Str;
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@ -83,8 +83,8 @@ public:
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virtual void emitDirectiveModuleOddSPReg(bool Enabled, bool IsO32ABI);
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virtual void emitDirectiveSetFp(MipsABIFlagsSection::FpABIKind Value){};
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virtual void emitMipsAbiFlags(){};
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void setCanHaveModuleDir(bool Can) { canHaveModuleDirective = Can; }
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bool getCanHaveModuleDir() { return canHaveModuleDirective; }
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void forbidModuleDirective() { ModuleDirectiveAllowed = false; }
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bool isModuleDirectiveAllowed() { return ModuleDirectiveAllowed; }
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// This method enables template classes to set internal abi flags
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// structure values.
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@ -112,7 +112,7 @@ protected:
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unsigned ReturnReg;
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private:
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bool canHaveModuleDirective;
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bool ModuleDirectiveAllowed;
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};
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// This part is for ascii assembly output
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