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Fix Thumb encoding of VMOV (scalar to ARM core register). The encoding is

the same as ARM except that the condition code field is always set to ARMCC::AL.

llvm-svn: 107107
This commit is contained in:
Bob Wilson 2010-06-29 00:26:13 +00:00
parent 9762137bd4
commit 2a4e6d0e34

View File

@ -1600,7 +1600,7 @@ void ARMCodeEmitter::emitNEONGetLaneInstruction(const MachineInstr &MI) {
unsigned Binary = getBinaryCodeForInstr(MI); unsigned Binary = getBinaryCodeForInstr(MI);
// Set the conditional execution predicate // Set the conditional execution predicate
Binary |= II->getPredicate(&MI) << ARMII::CondShift; Binary |= (IsThumb ? ARMCC::AL : II->getPredicate(&MI)) << ARMII::CondShift;
unsigned RegT = MI.getOperand(0).getReg(); unsigned RegT = MI.getOperand(0).getReg();
RegT = ARMRegisterInfo::getRegisterNumbering(RegT); RegT = ARMRegisterInfo::getRegisterNumbering(RegT);