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[AArch64] [FrameLowering] Allow conditional insertion of CFI instruction

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Summary:
The insertion of most CFI instructions during AArch64 frame lowering can
be disabled (e.g. using the function attribute `nounwind`).

This patch enables conditional insertion for one more CFI instruction.

Reviewers: t.p.northover, ostannard

Reviewed By: ostannard

Subscribers: kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70129
This commit is contained in:
David Tellenbach 2019-11-22 00:09:50 +01:00
parent c54438bc29
commit 2a6ba5cdac
3 changed files with 24 additions and 11 deletions
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14
lib/Target/AArch64/AArch64FrameLowering.cpp
View File

@ -935,15 +935,15 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF,
emitFrameOffset(MBB, MBBI, DL, AArch64::SP, AArch64::SP,
{-NumBytes, MVT::i8}, TII, MachineInstr::FrameSetup,
false, NeedsWinCFI, &HasWinCFI);
if (!NeedsWinCFI) {
if (!NeedsWinCFI && needsFrameMoves) {
// Label used to tie together the PROLOG_LABEL and the MachineMoves.
MCSymbol *FrameLabel = MMI.getContext().createTempSymbol();
// Encode the stack size of the leaf function.
unsigned CFIIndex = MF.addFrameInst(
MCCFIInstruction::createDefCfaOffset(FrameLabel, -NumBytes));
BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
.addCFIIndex(CFIIndex)
.setMIFlags(MachineInstr::FrameSetup);
// Encode the stack size of the leaf function.
unsigned CFIIndex = MF.addFrameInst(
MCCFIInstruction::createDefCfaOffset(FrameLabel, -NumBytes));
BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
.addCFIIndex(CFIIndex)
.setMIFlags(MachineInstr::FrameSetup);
}
}

8
test/CodeGen/AArch64/arm64-blockaddress.ll
View File

@ -7,12 +7,12 @@
define i64 @t() nounwind ssp {
entry:
; CHECK-LABEL: t:
; CHECK: adrp [[REG:x[0-9]+]], Ltmp1@PAGE
; CHECK: add {{x[0-9]+}}, [[REG]], Ltmp1@PAGEOFF
; CHECK: adrp [[REG:x[0-9]+]], Ltmp0@PAGE
; CHECK: add {{x[0-9]+}}, [[REG]], Ltmp0@PAGEOFF
; CHECK-LINUX-LABEL: t:
; CHECK-LINUX: adrp [[REG:x[0-9]+]], .Ltmp1
; CHECK-LINUX: add {{x[0-9]+}}, [[REG]], :lo12:.Ltmp1
; CHECK-LINUX: adrp [[REG:x[0-9]+]], .Ltmp0
; CHECK-LINUX: add {{x[0-9]+}}, [[REG]], :lo12:.Ltmp0
; CHECK-LARGE-LABEL: t:
; CHECK-LARGE: movz [[ADDR_REG:x[0-9]+]], #:abs_g0_nc:[[DEST_LBL:.Ltmp[0-9]+]]

13
test/CodeGen/AArch64/no_cfi.ll Normal file
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@ -0,0 +1,13 @@
; RUN: llc -mtriple aarch64-arm-linux-gnu -o - %s | FileCheck %s
; CHECK: a: // @a
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: sub sp, sp, #16
; CHECK-NOT: .cfi{{.*}}
; CHECK: ret
define void @a() nounwind {
%1 = alloca i32, align 4
store i32 1, i32* %1, align 4
ret void
}