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[ARM] Testcase for missed optimization for masking.

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When the result of masking is truncated to i16, we should try to use
"bic" instead of "and".

llvm-svn: 335001
This commit is contained in:
Eli Friedman 2018-06-19 00:08:32 +00:00
parent 60516b0257
commit 2a9c6ab27a
1 changed files with 46 additions and 12 deletions
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58
test/CodeGen/Thumb/bic_imm.ll
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@ -1,26 +1,60 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi -mcpu=cortex-m0 -verify-machineinstrs | FileCheck --check-prefix CHECK-T1 %s
; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi -mcpu=cortex-m3 -verify-machineinstrs | FileCheck --check-prefix CHECK-T2 %s
; CHECK-T1-LABEL: @i
; CHECK-T2-LABEL: @i
; CHECK-T1: movs r1, #255
; CHECK-T1: adds r1, #20
; CHECK-T1: bics r0, r1
; CHECK-T2: movw r1, #275
; CHECK-T2: bics r0, r1
define i32 @i(i32 %a) {
; CHECK-T1-LABEL: i:
; CHECK-T1: @ %bb.0: @ %entry
; CHECK-T1-NEXT: movs r1, #255
; CHECK-T1-NEXT: adds r1, #20
; CHECK-T1-NEXT: bics r0, r1
; CHECK-T1-NEXT: bx lr
;
; CHECK-T2-LABEL: i:
; CHECK-T2: @ %bb.0: @ %entry
; CHECK-T2-NEXT: movw r1, #275
; CHECK-T2-NEXT: bics r0, r1
; CHECK-T2-NEXT: bx lr
entry:
%and = and i32 %a, -276
ret i32 %and
}
; CHECK-T1-LABEL: @j
; CHECK-T2-LABEL: @j
; CHECK-T1: movs r1, #128
; CHECK-T1: bics r0, r1
; CHECK-T2: bic r0, r0, #128
define i32 @j(i32 %a) {
; CHECK-T1-LABEL: j:
; CHECK-T1: @ %bb.0: @ %entry
; CHECK-T1-NEXT: movs r1, #128
; CHECK-T1-NEXT: bics r0, r1
; CHECK-T1-NEXT: bx lr
;
; CHECK-T2-LABEL: j:
; CHECK-T2: @ %bb.0: @ %entry
; CHECK-T2-NEXT: bic r0, r0, #128
; CHECK-T2-NEXT: bx lr
entry:
%and = and i32 %a, -129
ret i32 %and
}
define void @truncated(i16 %a, i16* %p) {
; CHECK-T1-LABEL: truncated:
; CHECK-T1: @ %bb.0:
; CHECK-T1-NEXT: ldr r2, .LCPI2_0
; CHECK-T1-NEXT: ands r2, r0
; CHECK-T1-NEXT: strh r2, [r1]
; CHECK-T1-NEXT: bx lr
; CHECK-T1-NEXT: .p2align 2
; CHECK-T1-NEXT: @ %bb.1:
; CHECK-T1-NEXT: .LCPI2_0:
; CHECK-T1-NEXT: .long 65407 @ 0xff7f
;
; CHECK-T2-LABEL: truncated:
; CHECK-T2: @ %bb.0:
; CHECK-T2-NEXT: movw r2, #65407
; CHECK-T2-NEXT: ands r0, r2
; CHECK-T2-NEXT: strh r0, [r1]
; CHECK-T2-NEXT: bx lr
%and = and i16 %a, -129
store i16 %and, i16* %p
ret void
}